AM79C930VCW datasheet(110/161 Pages) AMD

110 / 161 page

AMD

P R E L I M I N A R Y

110

Am79C930

has also been set to a 1 and the PCMCIA pin is set to 1. The value

that is read from this bit represents the current value of the

TXDATA

pin of the Am79C930 device.

A complete description of the control of the function of the

TXDATA

pin is described in the

Multi-Function Pin section.

TCR8: Start Delimiter LSB

This register is the Start Delimiter LSB register.

CONFIGURATION REGISTER INDEX:

08h

Bit

Name

Reset Value

Description

7–0

SDLT[7:0]

00h

Start of Frame Delimiter. This register contains the LSB of the 24-bit

start delimiter field that is used for start of frame recognition during

reception and transmission in order to determine the start of MAC

CRC calculation. (Note that PFL of TCR3 may also affect start of

MAC CRC calculation start.) All, none or part of the 24-bit Start De-

limiter may be used for start of frame recognition by appropriate set-

tings of the SD[1:0] bits in the Network Configuration Register

(TCR0).

Start of Frame detection is performed on the bits in the or-

der that they appear on the medium, with the SDLT LSB, bit 0, being

checked against the first bit to arrive at the Am79C930 (RX case)

or the first bit to leave the Am79C930 (TX case) and continuing in

that order.

TCR9: Start Delimiter CSB

This register is the Start Delimiter CSB register.

CONFIGURATION REGISTER INDEX:

09h

Bit

Name

Reset Value

Description

7–0

SDLT[15:8]

00h

Start of Frame Delimiter. This register contains the Center Signifi-

cant Byte (CSB) of the 24-bit start delimiter field that is used for start

of frame recognition during reception and transmission in order to

determine the start of MAC CRC calculation. (Note that PFL of

TCR3 may also affect start of MAC CRC calculation start.) All, none

or part of the 24-bit Start Delimiter may be used for start of frame

recognition by appropriate settings of the SD[1:0] bits in the Net-

work Configuration Register (TCR0).

Start of Frame detection is

performed on the bits in the order that they appear on the medium,

with the SDLT LSB, bit 0, being checked against the first bit to arrive

at the Am79C930 (RX case) or the first bit to leave the Am79C930

(TX case) and continuing in that order.

TCR10: Start Delimiter MSB

This register is the Start Delimiter MSB register.

CONFIGURATION REGISTER INDEX:

0Ah

Bit

Name

Reset Value

Description

7–0

SDLT[23:16]

00h

Start of Frame Delimiter. This register contains the MSB of the

24-bit start delimiter field that is used for start of frame recognition

during reception and transmission in order to determine the start of

MAC CRC calculation. (Note that PFL of TCR3 may also affect start

of MAC CRC calculation start.) All, none or part of the 24-bit Start

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