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82845MP датащи(PDF) 39 Page - Intel Corporation |
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82845MP датащи(HTML) 39 Page - Intel Corporation |
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39 / 157 page ![]() Intel ® 82845MP/82845MZ Chipset-Mobile (MCH-M) 250687-002 Datasheet 39 R “Reserved” register location is read, a random value is returned. (“Reserved” registers can be 8-bit, 16- bit, or 32-bit in size.) Writes to “Intel Reserved” registers may cause system failure. Reads to “Intel Reserved” registers may return a non-zero value. Default Value Upon Reset: Upon a full Reset, the MCH-M sets all of its internal configuration registers to predetermined default states. Some register values at reset are determined by external strapping options. The default state represents the minimum functionality feature set required to successfully bring up the system. Hence, it does not represent the optimal system configuration. It is the responsibility of the system initialization software (usually BIOS) to properly determine the DRAM configurations, operating parameters and optional system features that are applicable, and to program the MCH-M registers accordingly. 3.5. I/O Mapped Registers The MCH-M contains two registers that reside in the CPU I/O address space: the Configuration Address (CONFIG_ADDRESS) Register and the Configuration Data (CONFIG_DATA) Register. The Configuration Address Register enables/disables the configuration space and determines what portion of configuration space is visible through the Configuration Data window. 3.5.1. CONFIG_ADDRESS – Configuration Address Register I/O Address: 0CF8h Accessed as a Dword Default Value: 00000000h Access: Read/Write Size: 32 bits CONFIG_ADDRESS is a 32-bit register that can be accessed only as a Dword. A Byte or Word reference will "pass through" the Configuration Address Register and the hub interface, onto the PCI bus as an I/O cycle. The CONFIG_ADDRESS register contains the Bus Number, Device Number, Function Number, and Register Number for which a subsequent configuration access is intended. Figure 2. Configuration Address Register R 1 0 2 7 8 11 15 16 23 24 30 31 10 R0 0 0 0 0 Reserved Register Number Function Number Device Number Bus Number Reserved Enable Bit Default |
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