Input Voltage

Schmitt-trigger

CMOS Input

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Input Voltage

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Noise Rejection

Supports Slow Inputs

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

SN74HCS72

SCLS801 – FEBRUARY 2020

SN74HCS72 Schmitt-Trigger Input Dual D-Type

Negative-Edge-Triggered Flip-Flops With Clear and Preset

1

1 Features

1

•

Wide operating voltage range: 2 V to 6 V

•

Schmitt-trigger inputs allow for slow or noisy input

signals

•

Low power consumption

–

–

Typical input leakage current of ±100 nA

•

±7.8-mA output drive at 5 V

•

Extended ambient temperature range: –40°C to

2 Applications

•

Convert a momentary switch to a toggle switch

•

Input slow edge-rate signals

•

Operate in noisy environments

•

Enable CAN Controller Power with wake-up

pattern

3 Description

This

device

contains

two

independent

D-type

negative-edge-triggered flip-flops. All inputs include

Schmitt-triggers, allowing for slow or noisy input

signals. A low level at the preset (PRE) input sets the

output high. A low level at the clear (CLR) input

resets the output low. Preset and clear functions are

asynchronous and not dependent on the levels of the

other inputs. When PRE and CLR are inactive (high),

data at the data (D) input meeting the setup time

requirements is transferred to the outputs (Q, Q) on

the negative-going edge of the clock (CLK) pulse.

Following the hold-time interval, data at the data (D)

input can be changed without affecting the levels at

the outputs (Q, Q).

Device Information(1)

PART NUMBER

PACKAGE

BODY SIZE (NOM)

SN74HCS72PWR

TSSOP (14)

5.00 mm x 4.40 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Benefits of Schmitt-trigger Inputs