LT4256-3IGN datasheet(6/20 Pages) LINER

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LT4256-3

42563f

PI FU CTIO S

UV (Pin 1): Undervoltage Sense Input. UV is an input that

enables the output voltage. When UV is driven above 4V,

GATE will start charging and the output turns on. When

UV goes below 3.6V, GATE discharges and the output

shuts off.

Pulsing UV to below 0.4V for at least 5

µs after a current

limit fault cycle resets the fault latch (when RETRY pin is

low, commanding latch off operation) and allows the part

to turn back on. This command is only accepted after

TIMER is discharged below 0.65V. To disable UV sensing,

connect the pin to a voltage between 5V and 44V.

OV (Pin 2): Overvoltage Sense Input. OV is an input that

disables the output voltage. If OV ever goes above 4V,

GATE is discharged and the output shuts off. When OV

goes below 3.6V, GATE starts charging and the output

turns back on. To disable overvoltage sensing, connect pin

to ground.

NC (Pins 3, 6, 11, 14): No Connect. Not connected to any

internal circuitry.

OPEN (Pin 4): Open Circuit Detect Output. This pin is an

open collector output that releases and is pulled high

through an external resistor if the load current is less than

(3mV)/R5.

PWRGD (Pin 5): Power Good Output. PWRGD is pulled

low whenever the voltage on FB falls below the high-to-low

threshold voltage. It goes into a high impedance state

when the voltage on FB exceeds the low-to-high threshold

voltage. An external pull-up resistor can pull PWRGD to a

voltage higher or lower than VCC.

RETRY (Pin 7): Current Fault Retry Input. RETRY com-

mands the operational mode of the current limit. If RETRY

is floating, the LT4256-3 automatically restarts after a

current fault. If it is connected to a voltage below 0.4V, it

will latch off after a current fault (which requires that UV be

cycled low in order to start normal operation again).

GND (Pin 8): Device Ground. This pin must be tied to a

ground plane for best performance.

TIMER (Pin 9): Timing Input. An external timing capacitor

from TIMER to GND programs the maximum time the part

is allowed to remain in current limit. When the part goes

into current limit, a 115

µA pull-up current source starts to

charge the timing capacitor. When the voltage on TIMER

reaches 4.65V (typ), GATE is pulled low; the TIMER pull-

up current will be turned off and the capacitor is discharged

by a 3

µApull-downcurrent.WhenTIMERfallsbelow0.65V

(typ), GATE turns on again if RETRY is high (if RETRY is

low, UV must be pulsed low to reset the internal fault latch

before GATE will turn on). If RETRY is grounded and UV is

not cycled low, GATE remains latched off and TIMER will

be discharged to near ground. UV must be cycled low after

TIMER has discharged below 0.65V (typ) to reset the part.

If RETRY is floating or connected to a voltage above its

1.2V threshold, the LT4256-3 automatically restarts after

a current fault. Under an output short-circuit condition, the

LT4256-3 cycles on and off with a 3% on-time duty cycle.

FB (Pin 10): Power Good Comparator Input. FB monitors

the output voltage through an external resistive divider.

When the voltage on FB is lower than the high-to-low

threshold of 3.99V, PWRGD is pulled low and released

when FB is pulled above the 4.45V low-to-high threshold.

The voltage present on FB affects foldback current limit

(see Figure 8 and related discussion).

VOUT (Pin 12): Output Voltage Sense Input. This pin

should be connected to the source of the external MOSFET.

It is used to sense when the MOSFET is shut off (during any

fault mode) and to reduce the pull-down current on GATE.

This protects the LT4256-3 from excessive power dissipa-

tion when large output capacitors are used.

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