CS44210

DS539PP1

25

4.10 Mode Control 3 (address 0Bh)

4.10.1 DIGITAL INTERFACE FORMATS (DIF)

Default = 00

01 - Right Justified, 16 bit

10 - Left Justified

11 - Right Justified, 24 bit

Function:

The required relationship between the Left/Right clock, serial clock and serial data is defined by the Digital

Interface Format and the options are detailed in figures 19 through 22.

4.10.2 CHANNEL A VOLUME = CHANNEL B VOLUME (A=B)

Default = 0

0 - Disabled

1 - Enabled

Function:

The HP_A and HP_B volume levels and the DRIVER_x outputs are independently controlled by the A and

the B Channel Volume Control Bytes when this function is disabled. The volume on both HP_A, HP_B,

DRIVER_A and DRIVER_B are determined by the A Channel Volume Control Byte and the B Channel

Byte is ignored when this function is enabled.

4.10.3 VOLUME CONTROL BYPASS (VCBYP)

Default = 0

0 - Disabled

1 - Enabled

Function:

The digital volume control section is bypassed when this function is enabled. This disables the digital vol-

ume control, muting, bass boost, treble boost, limiting, and ATAPI functions.

4.10.4 CONTROL PORT ENABLE (CP_EN)

Default = 0

0 - Disabled

1 - Enabled

Function:

This bit defaults to 0, allowing the device to power-up in Stand-Alone mode. The Control port mode can

be accessed by setting this bit to 1. This will allow the operation of the device to be controlled by the reg-

isters and the pin definitions will conform to Control Port Mode. Refer to Section 7.1

.

76543

210

DIF1

DIF0

A=B

VCBYP

CP_EN

FREEZE

HPSEN

Reserved

00000

000