CS6403 datasheet(24/54 Pages) CIRRUS

24 / 54 page

These processing blocks are described in the fol-

lowing sections.

Echo Cancellers

Echo cancellers provide two benefits to full-du-

p l ex co mm unication syst ems: loop-gain

reduction and echo reduction. Loop-gain reduc-

tion can prevent acoustic instability and acoustic

howling in systems where closed acoustic paths

are present. Echo reduction can prevent a talker

from hearing his own voice reflected back. Such

reflections are particularly annoying in systems

where there is a large transport or coding delay

in the communications paths. An echo canceller

provides echo reduction by estimating the im-

pulse response of the reflecting path, and then

substracting out the echo.

The echo cancellers in the CS6403 are designed

to best cancel echo produced in linear, time-in-

variant paths. Nonlinearities and time variance

in the paths can limit echo return-loss enhance-

ment (ERLE) performance.

A CS6403 provides two echo cancellers: an

acoustic echo canceller, and a network canceller

(see Figure 3). The network canceller removes

reflections due to impedance mismatches in the

network.

The acoustic canceller removes near

end speaker signals that are coupled into the

near-end microphone. In systems where there is

no network echo (e.g., in some ISDN applica-

tions), the network canceller can be disabled,

causing all 64 ms of echo cancellation available

on the CS6403 to be allocated to acoustic echo

cancellation.

This is done by setting NECD:

SSI_CR0.8 = 1.

The echo cancellers on the CS6403 train con-

tinuously using the speech signals (i.e, no special

training signals are generated by the CS6403 at

any time) from the far end (for the acoustic can-

celler) and from the near end (for the network

canceller).

The echo cancellers’ convergence

performance has been optimized for speech; as a

result, testing the echo-canceller performance

with white noise will not give a useful indication

of expected performance.

Digital

Ground

Plane

Note that the CS6403 is

oriented with its digital pins

(pins 1-17 and 29-44)

towards the digital end of

the board.

Digital Logic

Codec

Digital

Signals

Codec

Analog

Signals &

Components

1/8"

CS6403-IQ

+5V

Ferrite

Bead

Ground

Connection

XTAL

Analog

Ground

Plane

Figure 10. Suggested Layout Guideline

CS6403

DS192PP6

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