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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CS5504 датащи(PDF) 12 Page - Cirrus Logic |
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CS5504 датащи(HTML) 12 Page - Cirrus Logic |
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12 / 24 page  ated from the standby state, there may be up to two XIN clock cycles of uncertainty as to when conversion actually begins. This is because the internal logic operates at one half the external clock rate and the exact phase of the internal clock may be 180 ° out of phase relative to the XIN clock. When a new conversion is initiated from the standby state, it will take up to two XIN clock cycles to begin. Actual conversion will use 1624 clock cycles before DRDY goes low to indicate that the serial port has been up- dated. See the Serial Interface Logic section of the data sheet for information on reading data from the serial port. In the event the A/D conversion command (CONV going positive) is issued during the con- version state, the current conversion will be terminated and a new conversion will be initi- ated. Voltage Reference The CS5504 uses a differential voltage reference input. The positive input is VREF+ and the negative input is VREF-. The voltage between VREF+ and VREF- can range from 1 volt mini- mum to 3.6 volts maximum. The gain slope will track changes in the reference without recalibra- tion, accommodating ratiometric applications. Analog Input Range The analog input range is set by the magnitude of the voltage between the VREF+ and VREF- pins. In unipolar mode the input range will equal the magnitude of the voltage reference. In bipolar mode the input voltage range will equate to plus and minus the magnitude of the voltage reference. While the voltage reference can be as great as 3.6 volts, its common mode voltage can be any value as long as the reference inputs VREF+ and VREF- stay within the supply volt- ages for the A/D. The differential input voltage can also have any common mode value as long as the maximum signal magnitude stays within the supply voltages. The A/D converter is intended to measure dc or low frequency inputs. It is designed to yield ac- curate conversions even with noise exceeding the input voltage range as long as the spectral components of this noise will be filtered out by the digital filter. For example, with a 3.0 volt reference in unipolar mode, the converter will accurately convert an input dc signal up to 3.0 volts with up to 15% overrange for 60 Hz noise. A 3.0 volt dc signal could have a 60 Hz component which is 0.5 volts above the maxi- mum input of 3.0 (3.5 volts peak; 3.0 volts dc plus 0.5 volts peak noise) and still accurately convert the input signal (XIN = 32.768 kHz). This assumes that the signal plus noise ampli- tude stays within the supply voltages. The CS5504 converters output data in binary format when converting unipolar signals and in offset binary format when converting bipolar signals. Table 2 outlines the output coding for both unipolar and bipolar measurement modes. Unipolar Input Voltage Output Codes Bipolar Input Voltage >(VREF - 1.5 LSB) FFFFF >(VREF - 1.5 LSB) VREF - 1.5 LSB FFFFF FFFFE VREF - 1.5 LSB VREF/2 - 0.5 LSB 80000 7FFFF -0.5 LSB + 0.5 LSB 00001 00000 -VREF + 0.5 LSB <(+ 0.5 LSB) 00000 <(VREF + 0.5 LSB) Note: Table excludes common mode voltage on the signal and reference inputs. Table 2. Output Coding CS5504 12 DS126F1 CS5504 12 DS126F2 |
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