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INTELLON CONFIDENTIAL
28
ADVANCE INFORMATION
Rev 8.1
INT5130 Integrated Powerline MAC/PHY Transceiver Technical Data Sheet
DAC DC Characteristics
Symbol
Parameter
Conditions
Min
Typical
Max
Unit
Number of Bits
10
Bits
Data Format
Straight Binary
Sample Rate
50
MSPS
DAC DATA OUTPUTS
VOH
HIGH level output voltage
1, 2
2.4
V
VOL
LOW level output voltage
1, 3
0.4
V
TAFE_RVAL
Propagation Delay Time
1
5.0
8.2
15.0
ns
DAC CLOCK OUTPUT
tAFE_PW
DAC Clock Pulse Width
1
10
15
ns
tAFE_R
DAC Clock Rise Time
1
2
ns
tAFE_FT
DAC Clock Fall Time
1
2
ns
tJ
DAC Clock Jitter
1
75
ps rms
Conditions: 1) VDD = 3.3V, CL = 15pF, RL = 1K
Ω
2) IOH = -1mA
3) IOL = 1mA
Table 9: DAC DC Characteristics
ADC DC Characteristics
Symbol
Parameter
Conditions
Min
Typical
Max
Unit
Number of Bits
10
Bits
Data Format
Straight Binary
Sample Rate
50
MSPS
ADC DATA INPUTS
VIH
HIGH level input voltage
1
2.0
V
VIL
LOW level input voltage
1
0.8
V
TA
Aperture Delay Time
1
2.7
ns
tAFE_TSU
Data Setup Time
1
3
ns
tAFE_TH
Data Hold Time
1
3
ns
ADC CLOCK OUTPUT
VOH
HIGH level output voltage
1
2.1
V
VOL
LOW level output voltage
1
0.9
V
tAFE_H
ADC/DAC Clock Pulse Width
High
1
10
15
ns
tAFE_L
ADC/DAC Clock Pulse Width
Low
1
10
15
ns
tAFE_R
ADC/DAC Clock Rise Time
1
2
ns
tAFE_FT
ADC/DAC Clock Fall Time
1
2
ns
tJ
ADC/DAC Clock Jitter
1
75
ps rms
Conditions: 1) VDD = 3.3V, CL = 15pF, RL = 1K
Ω
Table 10: ADC DC Characteristics
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