CY7C024V/025V/026V
CY7C0241V/0251V/036V
2
PRELIMINARY
Functional Description
The CY7C024V/025V/026V and CY7C0241V/0251V/036V
are low-power CMOS 4K, 8K, and 16K x16/18 dual-port static
RAMs. Various arbitration schemes are included on the devic-
es to handle situations when multiple processors access the
same piece of data. Two ports are provided, permitting inde-
pendent, asynchronous access for reads and writes to any
location in memory. The devices can be utilized as standalone
16/18-bit dual-port static RAMs or multiple devices can be
combined in order to function as a 32/36-bit or wider mas-
ter/slave dual-port static RAM. An M/S pin is provided for im-
plementing 32/36-bit or wider memory applications without the
need for separate master and slave devices or additional dis-
crete logic. Application areas include interprocessor/multipro-
cessor designs, communications status buffering, and dual-
port video/graphics memory.
Each port has independent control pins: chip enable (CE),
read or write enable (R/W), and output enable (OE). Two flags
are provided on each port (BUSY and INT). BUSY signals that
the port is trying to access the same location currently being
accessed by the other port. The interrupt flag (INT) permits
communication between ports or systems by means of a mail
box. The semaphores are used to pass a flag, or token, from
one port to the other to indicate that a shared resource is in
use. The semaphore logic is comprised of eight shared latch-
es. Only one side can control the latch (semaphore) at any
time. Control of a semaphore indicates that a shared resource
is in use. An automatic power-down feature is controlled inde-
pendently on each port by a chip select (CE) pin.
The CY7C024V/025V/026V and CY7C0241V/0251V/036V
are available in 100-pin Thin Quad Plastic Flatpacks (TQFP).
Pin Configurations
Notes:
6.
A12L on the CY7C025.
7.
A12R on the CY7C025.
Top View
100-Pin TQFP
100 99
97
98
96
2
3
1
42
41
59
60
61
12
13
15
14
16
4
5
40
39
95 94
17
26
9
10
8
7
6
11
27 28
30
29
31 32
35
34
36 37 38
33
67
66
64
65
63
62
68
69
70
75
73
74
72
71
89 88
86
87
85
93 92
84
NC
NC
NC
NC
A5L
A4L
INTL
A2L
A0L
BUSYL
GND
INTR
A0R
A1L
NC
NC
NC
NC
I/O10L
I/O11L
I/O15L
VCC
GND
I/O1R
I/O2R
VCC
90
91
A3L
M/S
BUSYR
I/O14L
GND
I/O12L
I/O13L
A1R
A2R
A3R
A4R
NC
NC
NC
NC
I/O3R
I/O4R
I/O5R
I/O6R
NC
NC
NC
NC
18
19
20
21
22
23
24
25
83 82 81 80 79 78 77 76
58
57
56
55
54
53
52
51
43 44 45 46 47 48 49 50
I/O0R
CY7C024V (4K x 16)
CY7C025V (8K x 16)
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