©2019 Device Engineering Inc.

Page 8 of 12

DS-MW-01067-01 Rev G

2/7/2019

Table 5 Electrical Characteristics

SYMBOL

PARAMETER

CONDITIONS (1)

LIMITS

UNIT

MIN

MAX

LOGIC INPUTS AND OUTPUTS

VIH

HI level input voltage

2.0

V

VIL

LO level input voltage

0.8

V

VHST

Input hysteresis voltage,

SCLK input

(3)

50

mV

VOH

HI level output voltage

IOUT = -20 uA

VCC –

0.1

V

IOUT = -4.5 mA

VCC = 4.5 V to 5.5 V

3.2

V

VOL

LO level output voltage

IOUT = 20 uA

0.1

V

IOUT = 4.5 mA

VCC = 4.5 V to 5.5 V

0.4

V

IIN

Input leakage

Logic inputs except SDIN.

SDIN

DINn = VCC or GND

-1.0

-1.0

1.0

750

uA

IOZ

Max 3-state leakage

current

Output in Hi Impedance state.

DOUT = 0 to VCC

-5.0

5.0

uA

DISCRETE INPUTS

VIH

HI level input voltage

7.5

V

RIH

HI level DIN-to-GND

resistance

Resistor from DIN to GND to

guarantee HI input condition.

100

kΩ

IIH

HI level input current

DIN = 7.5 V, VDD = 15 V

-732

-212

uA

VIL

LO level input voltage

3.5

V

RIL

LO level DIN-to-GND

resistance

Resistor from DIN to GND to

guarantee LO input condition.

10

Ω

IIL

LO level input current

DIN = 0 V, VDD = 15 V

-1.55

-0.45

mA

VHST

Input hysteresis voltage

1.0

V

SUPPLY VOLTAGES

ICC

Max quiescent logic

supply current

Vin(logic) = VCC or GND

DIN[8:1] = Open

200

uA

IDD

Max quiescent analog

supply current

Vin(logic) = VCC or GND

DIN[8:1] = Open

DIN[8:1] = GND

12.8

24

mA

Notes:

1. Ta = -55 to +85 °C. VDD = +15 V ±10%, VCC = 3.0 to 5.5 V unless otherwise noted.

2. Current flowing into device is positive. Current flowing out of device is negative. Voltages

are referenced to Ground.

3. Guaranteed by design. Not production tested.