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IT8705F V0.4
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Power On Strapping Options
7. Power On Strapping Options
Table 7-1. Power On Strapping Options
Signal
Description
JP1
Flash_Seg1
Flash ROM Interface Address Segment 1 (FFFF0000h-FFFFFFFFh,
FFFE0000h-FFFEFFFFh) Enable.
JP2
Flash_Seg2
Flash ROM Interface Address Segment 2 (FFEF0000h-FFEFFFFh,
FFEE0000h-FFEEFFFFh) Enable.
JP3
Flash_Seg3
Flash ROM Interface Address Segment 3 (FFF80000h-FFFDFFFFh,
FFFE0000h-FFFEFFFFh) Enable.
JP4
Flash_Seg4
Flash ROM Interface Address Segment 4 (000F0000h-000FFFFFh,
000E0000h-000EFFFFh) Enable.
JP5
4M_Flash_En 4M Flash ROM Enable (Pin 75 is selected as FA18).
JP6
Chip_sel
Chip selection in Configuration.