VOUT

VREF

Cu Plane

Cu Plane

IN+

IN±

VS

GND

Solder Mask Creepage

Cu Plane

Cu Plane

28

TMCS1100

SBOS820 – SEPTEMBER 2019

www.ti.com

Product Folder Links: TMCS1100

Submit Documentation Feedback

Copyright © 2019, Texas Instruments Incorporated

Layout Guidelines (continued)

In addition to thermal and magnetic optimization, make sure to consider the PCB design required creepage and

clearance for system-level isolation requirements. Maintain required creepage between solder stencils, as shown

in Figure 16, if possible. If not possible to maintain required PCB creepage between the two isolated sides at

board level, add additional slots or grooves to the board. If more creepage and clearance is required for system

isolation levels than is provided by the package, the entire device and solder mask can be encapsulated with an

overmold compound to meet system-level requirements.

Figure 16. Layout for System Creepage Requirements

12.2 Layout Example

An example layout, shown in Figure 17, is from the TMCS1100EVM. Device performance is targeted for thermal

and magnetic characteristics of this layout, subject to change.

Figure 17. Recommended Board Top (Left) and Bottom (Right) Plane Layout