PIC18LF8621 datasheet(13/396 Pages) MICROCHIP

13 / 396 page

 2005 Microchip Technology Inc.

DS39612B-page 11

PIC18F6525/6621/8525/8621

TABLE 1-2:

PIC18F6525/6621/8525/8621 PINOUT I/O DESCRIPTIONS

Pin Name

Pin Number

Type

Buffer

Type

Description

PIC18F6X2X

PIC18F8X2X

MCLR/VPP/RG5(9)

MCLR

VPP

RG5

—

Master Clear (input) or programming

voltage (output).

Master Clear (Reset) input. This pin is an

active-low Reset to the device.

Programming voltage input.

Digital input.

OSC1/CLKI

OSC1

CLKI

CMOS/ST

CMOS

Oscillator crystal or external clock input.

Oscillator crystal input or external clock

source input. ST buffer when configured

in RC mode; otherwise CMOS.

External clock source input. Always

associated with pin function OSC1 (see

OSC1/CLKI, OSC2/CLKO pins).

OSC2/CLKO/RA6

OSC2

CLKO

RA6

I/O

—

TTL

Oscillator crystal or clock output.

Oscillator crystal output. Connects to

crystal or resonator in Crystal oscillator

mode.

In RC mode, OSC2 pin outputs CLKO

which has 1/4 the frequency of OSC1

and denotes the instruction cycle rate.

General purpose I/O pin.

Legend: TTL = TTL compatible input

CMOS = CMOS compatible input or output

= Schmitt Trigger input with CMOS levels

Analog = Analog input

= Input

= Output

= Power

= Open-Drain (no P diode to VDD)

Note 1: Alternate assignment for ECCP2/P2A in PIC18F8525/8621 devices when CCP2MX (CONFIG3H<0>) is not set (all

Program Memory modes except Microcontroller).

2: Default assignment for ECCP2/P2A when CCP2MX is set (all devices).

3: External memory interface functions are only available on PIC18F8525/8621 devices.

4: Default assignment for P1B/P1C/P3B/P3C for PIC18F8525/8621 devices when ECCPMX (CONFIG3H<1>) is set and for

all PIC18F6525/6621 devices.

5: Alternate assignment for ECCP2/P2A in PIC18F8525/8621 devices when CCP2MX is not set (Microcontroller mode).

6: PORTH and PORTJ (and their multiplexed functions) are only available on PIC18F8525/8621 devices.

7: Alternate assignment for P1B/P1C/P3B/P3C for PIC18F8525/8621 devices when ECCPMX (CONFIG3H<1>) is not set.

8: AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for proper operation of

the part in user or ICSP™ modes. See parameter D001 for details.

9: RG5 is multiplexed with MCLR and is only available when the MCLR Resets are disabled.

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