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AMT49702KLPATR датащи(PDF) 7 Page - Allegro MicroSystems |
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AMT49702KLPATR датащи(HTML) 7 Page - Allegro MicroSystems |
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7 / 10 page ![]() Dual DMOS Full-Bridge Motor Driver AMT49702 7 Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com FUNCTIONAL DESCRIPTION Device Operation The AMT49702 is a dual full-bridge motor driver capable of operating one stepper motor, two DC motors, or one high-current DC motor. MOSFET output stages substantially reduce the volt- age drop and the power dissipation of the AMT49702 outputs, compared to typical drivers with bipolar transistors. Output current can be regulated by pulse-width modulating (PWM) the inputs. In addition to supporting external PWM of the driver, the AMT49702 limits the peak current by internally PWMing the source driver when the current in the winding exceeds the peak current, as determined by a sense resistor. If internal current limiting is not needed, the sense pin should be shorted to ground. Internal circuit protection includes thermal shutdown with hys- teresis, undervoltage lockout, internal clamp diodes, crossover current protection, and overcurrent protection. External PWM Output current regulation can be achieved by pulse-width modu- lating the inputs. Slow decay mode is selected by holding one input high while PWMing the other input. Holding one input low and PWMing the other input results in fast decay. Blanking This function blanks the output of the current sense comparator when the outputs are switched. The comparator output is blanked to prevent false overcurrent detections due to reverse recovery currents of the clamp diodes or to switching transients related to the capacitance of the load. The blank time, tBLANK, is approxi- mately 3 μs. Sleep Mode An active-low control input used to minimize power consump- tion when the AMT49702 is not in use. This disables much of the internal circuitry including the output drivers, internal regulator, and charge pump. A logic high allows normal operation. When coming out of sleep mode, wait 1.5 ms before issuing a command to allow the internal regulator and charge pump to stabilize. Enable When all logic inputs are pulled to logic low, the outputs of the bridges are disabled. The charge pump and internal circuitry continue to run when the outputs are disabled. Thermal Shutdown The AMT49702 will disable the outputs if the junction tempera- ture reaches 165°C. When the junction temperature drops 20°C, the outputs will be enabled. Brake Mode When driving DC motors, the AMT49702 goes into brake mode (turns on both sink drivers) when both of its inputs are high (IN1 and IN2, or IN3 and IN4). There is no current limiting during braking, so care must be taken to ensure that the peak current dur- ing braking does not exceed the absolute maximum current. Internal PWM Current Control Each full-bridge is controlled by a fixed off-time PWM current control circuit that limits the load current to a desired value, ITRIP. Initially, a diagonal pair of source and sink DMOS outputs are enabled and current flows through the motor winding and the current sense resistor, RSENSEx. When the voltage across RSENSEx equals the internal reference voltage, the current sense compara- tor resets the PWM latch, which turns off the source driver. The maximum value of current limiting, ITRIP(max), is set by the selection of the sense resistor, RSENSEx, and is approximated by a transconductance function: ITRIP(max) = 0.2 ÷ RSENSEx It is critical to ensure the maximum rating on SENSEx pins (0.5 V) is not exceeded. Synchronous Rectification When a PWM off-cycle is triggered by an internal fixed off-time cycle, load current recirculates in slow decay SR mode. During slow decay, current recirculates through the sink-side FET and the sink-side body diode. The SR feature enables the sink-side FET, effectively shorting out the body diode. The sink driver is |
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