GPL32611B datasheet(14/22 Pages) GENERALPLUS

14 / 22 page

GPL32611B

Proprietary & Confidential

Oct. 02, 2018

Version: 1.3

MSB

LSB

SCLK

SFRM

SSPTXD

SSPOE

8 bits

MSB

LSB

SSPRXD

SPO = 1, SPH = 0

MSB

SCLK

SFRM

SSPTXD

SSPOE

8 bits

MSB

LSB

SSPRXD

LSB

SPO = 1, SPH = 1

5.15.2. UART/IrDA function

The UART/IrDA controller inside the GPL32611B supports baud

rate up to 1.8432MHz (UART).

There are two dedicated 16-byte

FIFOs.

One is used to prevent the data loss when receiving data

and the other is used to transmit data.

DMA transfer is available

for both transmitting and receiving operations.

5.15.3. USB2.0 Mini-host/Device function

The GPL32611B has USB2.0 mini-host and device function,

compatible with USB 1.1 and USB 2.0 high speed standards.

The mini-host and device function are not allowed to be active at

the same time.

An USB transceiver is built-in for both host and

devices function.

A FIFO with size of 1024x8 is used for bulk-in

and bulk-out transfer and a 64-byte FIFO is used for control pipe

transfer.

Interrupt IN/OUT pipes are also supported.

The DMA

transfer is enabled for bulk-in/out to maximize the transfer

performance.

5.16. DMA Controller

The GPL32611B provides four DMA channels and each channel

can be individually configured in I/O to MEM, MEM to I/O or MEM

to MEM mode.

5.17. Secure Digital / Multi-Media Card Controller

The

SD/MMC

controller

compatible

with

MMC

system

specification version 2.3, SD Memory Card specification 2.0,

SDHC and SDIO card interface.

The controller supports

automatically CRC generation and check, 1-bit and 4-bit transfer,

interrupt generation when buffer empty/full, DMA transfer for page

read/write.

5.18. Memory Stick Controller

The GPL32611B supports Memory Stick/Memory Stick PRO

controller, compatible with Memory Stick PRO Spec ver.1.02.

provides one data signal in serial mode or four data signals in

parallel mode and it uses CRC16 as a transaction protection code.

An 8x32 bits bi-direction FIFO is featured when using page

read/write TPC command.

Multi-bytes register read/write and a

page read/write by DMA are available.

5.19. Boost DC-DC Control Logic

The GPL32611B supports 2-channel DC-DC Boost control circuit

for LED Backlight and VGH/VGL voltage generator of TFT-LCD

drivers to reduce the cost of application circuit.

5.20. Real Time Clock (RTC)

The RTC block supports independent power supply, and also

offers the alarm function, schedule function, and day/ hour/

minute/ second/ half-second interrupt function.

5.21. Multiple Face Detection

The GPL32611B supports hardware face detecting acceleration.

In addition, t With the flexibility of programmable feature table, the

engine can become a gesture or eye detection accelerator and it

supports resolution up to 320x240 @5 fps for face detection,

YUV422,Y input source format and source image rotation

( 0,90,180,270 degree).

5.22. MIPI Function

The GPL32611B supports a mobile industry processor interface

(MIPI) controller.

This engineer can support one data lane and

output CCIR601 interface.

5.23. Analog Control

5.23.1. DAC control

A 16-bit stereo DAC (2-channel) is embedded for both left and

right channels.

A 16x16 FIFO is used to prevent the sound glitch

when CPU is busy.

The left and right channels do not need to

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