L6710 datasheet(22/34 Pages) STMICROELECTRONICS

22 / 34 page

L6710

22/34

Considering now that in the application of interest it can be assumed that Ro>>RL; ESR<<Ro and

RDROOP<<Ro, it results:

The ACM control loop gain is designed to obtain a high DC gain to minimize static error and cross the 0dB

axes with a constant -20dB/dec slope with the desired crossover frequency

ωT. Neglecting the effect of

ZF(s), the transfer function has one zero and two poles. Both the poles are fixed once the output filter is

designed and the zero is fixed by ESR and the Droop resistance. To obtain the desired shape an RF-CF

series network is considered for the ZF(s) implementation. A zero at

ωF=1/RFCF is then introduced togeth-

er with an integrator. This integrator minimizes the static error while placing the zero in correspondence

with the L-C resonance a simple -20dB/dec shape of the gain is assured (See Figure 15). In fact, consid-

ering the usual value for the output filter, the LC resonance results to be at frequency lower than the above

reported zero.

Compensation network can be simply designed placing

ωZ= ωLC and imposing the cross-over frequency

T as desired obtaining:

Figure 15. ACM Control Loop Gain Block Diagram (left) and Bode Diagram (right).

LAYOUT GUIDELINES

Since the device manages control functions and high-current drivers, layout is one of the most important

things to consider when designing such high current applications.

A good layout solution can generate a benefit in lowering power dissipation on the power paths, reducing

radiation and a proper connection between signal and power ground can optimize the performance of the

control loops.

Integrated power drivers reduce components count and interconnections between control functions and

drivers, reducing the board space.

Here below are listed the main points to focus on when starting a new layout and rules are suggested for

a correct implementation.

LOOP s

()

---

∆V

OSC

-------------------

F s

()

---------------

1s Co

DROOP

ESR

()

⋅

---

2Ro

⋅

---------------

Co ESR

-------

⋅

----------------------------------------------------------------------------------------------------------------------------------

⋅⋅

⋅

–

∆V

OSC

⋅

----------------------------------

---

DROOP

ESR

()

⋅

-------------------------------------------------------

---

⋅

--------------------

⋅⋅

⋅

Rout

Cout

ESR

L/2

RFB

REF

PWM

IFB

VCOMP

VOUT

•VIN

ωT

ωZ

ωLC

GLOOP

ZF(s)

OSC

∆V













⋅

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