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CD4093B датащи(PDF) 3 Page - Silicon Supplies

номер детали CD4093B
подробное описание детали  CMOS High Voltage Logic
PDF  6 Pages
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производитель  SS [Silicon Supplies]
домашняя страница  https://siliconsupplies.com/
Logo SS - Silicon Supplies

CD4093B датащи(HTML) 3 Page - Silicon Supplies

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CMOS High Voltage Logic – CD4093B
Rev 1.0
21/11/17
PARAMETER
SYMBOL
MIN
MAX
UNITS
Supply Voltage
VDD
3.0
18
V
DC Input Voltage, Output Voltage
VIN, VOUT
0
VDD
V
Operating Temperature Range
TJ
-55
+125
°C
Recommended Operating Conditions3 (Voltages referenced to V
SS)
Absolute Maximum Ratings1
PARAMETER
SYMBOL
VALUE
UNIT
DC Supply Voltage (Referenced to VSS)
VDD
-0.5 to +20
V
DC Input or Output Voltage (Referenced to VSS)
VIN, VOUT
-0.5 to VDD+0.5
V
Storage Temperature Range
TSTG
-65 to 150
°C
Input Current or Output Current (per Pad)
IIN, IOUT
±10
mA
Power Dissipation in Still Air
2
PD
500
mW
 
LIMITS
PARAMETER
SYMBOL
VDD
CONDITIONS
25°C
85°C
FULL RANGE
4
UNITS
5V
VIN = VDD or VSS
4.95
4.95
4.95
10V
VIN = VDD or VSS
9.95
9.95
9.95
Minimum High-
Level Output
Voltage
VOH
15V
VIN = VDD or VSS
14.95
14.95
14.95
V
5V
VIN = VDD
0.05
0.05
0.05
10V
VIN = VDD
0.05
0.05
0.05
V
Maximum Low-
Level Output
Voltage
VOL
15V
VIN = VDD
0.05
0.05
0.05
Maximum Input
Leakage Current
IIN
18V
VIN = VDD or VSS
±0.1
±0.1
±1.0
µA
5V
1
30
30
10V
2
60
60
15V
4
20
120
Maximum
Quiescent Supply
Leakage Current
IDD
20V
VIN = VDD or VSS
IOUT = 0µA
20
60
600
µA
5V
VIN = VDD or VSS
VOL = 0.4V
0.64
0.42
0.36
10V
VIN = VDD or VSS
VOL = 0.5V
1.6
1.1
0.9
Minimum Output
Low (Sink) Current
IOL
15V
VIN = VDD or VSS
VOL = 1.5V
4.2
2.8
2.4
mA
DC Electrical Characteristics (Voltages referenced to V
SS)
3.  This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken
to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be
constrained to the range VSS ≤ (VIN or VOUT) ≤ VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD).
Unused outputs must be left open.
1.  Operation above the absolute maximum rating may cause device failure. Operation at the absolute maximum ratings, for extended periods, may
reduce device reliability. 2. Measured in plastic DIP package, results in die form are dependent on die attach and assembly method.



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