Data sheet

BMP183

Page 20

BST-BMP183-DS000-00 | Revision 1.0 | June 2012

Bosch Sensortec

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parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

5.2 SPI protocol

CSB is active low with pull-up resistor integrated. Data on SDI is latched by BMP183 at SCK

rising edge and SDO is changed at SCK falling edge. Communication starts when CSB goes to low

and stops when CSB goes to high; during these transitions on CSB, SCK must be high.

In the SPI protocol, the MSB of the register address remains is not used. For example, register 0xF7

is addressed by 0x77 in SPI mode. Bit 7 is replaced by an R/W bit (read: „1‟, write: „0‟).

Figure 7: SPI protocol

When write is required, sequences of two bytes are required: one control byte to define the address

to be written to and one data byte which is written:

Figure 8: SPI write of two bytes

When read is required, the sequence consists in one control byte to define the first address to be read followed

by data bytes. Addresses are automatically incremented.

Figure 9: SPI read of two bytes