HT560

I2S Input Stereo Class D Amplifier

Copyright©2018, Jiaxing Heroic Technology Co., Ltd

-2-

7/2018 – V1.0

EP

DVDD

1

\FAULT

\SD

FREQ/SDA

PBTL/SCL

GAIN0

GAIN1

SLEEP/ADR

MCLK

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16 17 18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

36 35 34 33

BSTRPB+

BSTRPB-

BSTRPA-

BSTRPA+

OUTB+

OUTB-

OUTA+

OUTA-

PGND

Top View

Terminal

No.

Name

Description

1

\FAULT

O

Speaker amplifier fault terminal, which is pulled LOW when an internal

fault occurs

2

\SD

I

Places the speaker amplifier in shutdown mode while pulled down.

3

FREQ/SDA

I

Dual function pin that functions as an I²C data input pin in I²C Control Mode

or as a Frequency Select terminal when in Hardware Control Mode.

4

PBTL/SCL

I

Dual function pin that functions as an I²C clock input terminal in I²C Control

Mode or configures the device to operate in pre-filter Parallel Bridge Tied

Load (PBTL) mode when in Hardware Control Mode.

5

DVDD

P

Power supply for the internal digital circuitry

6

GAIN0

I

Adjusts the LSB of the multi-bit gain of the speaker amplifier

7

GAIN1

I

Adjusts the MSB of the multi-bit gain of the speaker amplifier

8

SLLEP/ADR

I

In Hardware Control Mode, places the speaker amplifier in sleep mode. In

9

MCLK

I

Master Clock used for internal clock tree, sub-circuit/state machine, and

Serial Audio Port clocking

10

SCLK

I

Bit clock for the digital signal that is active on the serial data port's input

data line

11

SDIN

I

Data line to the serial data port