PIC12F635ESLASHP datasheet(83/196 Pages) MICROCHIP

83 / 196 page

Preliminary

DS41232B-page 81

PIC12F635/PIC16F636/639

11.14.2

INACTIVITY TIMER

The Inactivity Timer is used to automatically return the

AFE to Standby mode, if there is no input signal. The

time-out period is approximately 16 ms (TINACT), based

on the 32 kHz internal clock.

The purpose of the Inactivity Timer is to minimize AFE

current draw by automatically returning the AFE to the

lower current Standby mode, if there is no input signal

for approximately 16 ms.

The timer is reset when:

• An amplitude change in LF input signal, either

high-to-low or low-to-high

•CS pin is low (any SPI™ command)

• Timer-related Soft Reset

The timer starts when:

• AFE receives any LF signal

The timer causes an AFE Soft Reset when:

• A previously received LF signal does not change

either high-to-low or low-to-high for TINACT

The Soft Reset returns the AFE to Standby mode where

most of the analog circuits, such as the AGC,

demodulator and RC oscillator, are powered down. This

returns the AFE to the lower Standby Current mode.

11.14.3

ALARM TIMER

The Alarm Timer is used to notify the MCU that the AFE

is receiving LF signal that does not pass the output

enable filter requirement. The time-out period is

approximately 32 ms (TALARM) in the presence of

continuing noise.

The Alarm Timer time-out occurs if there is an input

signal for longer than 32 ms that does not meet the

output enable filter requirements. The Alarm Timer

time-out causes:

The ALERT pin to go low.

The ALARM bit to set in the AFE Status

Configuration 7 register (Register 11-8).

The MCU is informed of the Alarm timer time-out by

monitoring the ALERT pin. If the Alarm timer time-out

occurs, the MCU can take appropriate actions such as

lowering channel sensitivity or disabling channels. If

the noise source is ignored, the AFE can return to a

lower standby current draw state.

The timer is reset when the:

•CS pin is low (any SPI command).

• Output enable filter is disabled.

• LFDATA pin is enabled (signal passed output

enable filter).

The timer starts when:

• Receiving a LF signal.

The timer causes a low output on the ALERT pin when:

• Output enable filter is enabled and modulated

input signal is present for TALARM, but does not

pass the output enable filter requirement.

11.14.4

PULSE WIDTH TIMER

The Pulse Width Timer is used to verify that the

received output enable sequence meets both the

minimum TOEH and minimum TOEL requirements.

11.14.5

PERIOD TIMER

The Period Timer is used to verify that the received

output enable sequence meets the maximum TOET

requirement.

11.14.6

AGC SETTLING TIMER (TAGC)

This timer is used to keep the output enable filter in

Reset while the AGC settles on the input signal. The

time-out period is approximately 3.5 ms. At end of this

time (TAGC), the input should remain high (TPAGC),

otherwise the counting is aborted and a Soft Reset is

issued. See Figure 11-6 for details.

Note:

The Alarm timer is disabled if the output

enable filter is disabled.

Note 1: The AFE needs continuous and

uninterrupted high input signal during

AGC settling time (TAGC). Any absence of

signal during this time may reset the timer

and a new input signal is needed for AGC

settling time, or may result in improper

AGC gain settings which will produce

invalid output.

2: The rest of the AFE section wakes up if any

of these input channels receive the AGC

settling time correctly. AFE Status Register

7 bits <4:2> (Register 11-8) indicate which

input channels have waken up the AFE

first. Valid input signal on multiple input pins

can cause more than one channel's

indicator bit to be set.

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