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FS9721_LP1 датащи(PDF) 26 Page - Fortune Semiconductor Corp. |
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FS9721_LP1 датащи(HTML) 26 Page - Fortune Semiconductor Corp. |
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26 / 41 page ![]() FS9721_LP1 Rev. 2.0 25/41 14.11 AC Commutation Circuit Diagram 21 is the average commutation circuit diagram of FS9711B. In the circuit, AC signals enter IC through R26, and then in the process of voltage division through R26, R25, R24, R23 and R22. The divided AC signals are out from OP1O pin and enter IC through ADIP pin and ADIN pin after commutation. VR2 can adjust the voltage of the signals to do the calibration of AC measurement. 240mV mode is amplified 10 times through OP. Diagram 22 is the peak commutation circuit diagram. Diagram 23 is the true validity commutation circuit diagram, the user can determine by self according to the need to select which commutation circuit. + _ + _ + _ R9 90K R8 10K C5 4.7uF R6 28.5K VR1 VR2K R13 22K R14 22K C9 0.47uF C11 0.47uF D1 D2 R12 100K R15 100K C12 27nF C10 27nF To Digit Part INL INH To ADC V- To ADC V+ ADIP ADIN OP2O OP2N OP1O OP1N To ADC V+ FS9721_LP1 Diagram 21 Average Commutation Circuit Diagram + _ + _ + _ R9 90k R8 10k C5 4.7米F R6 28.5k VR1 R13 22k R14 22k D1 D2 C12 27nF To Digit Part INL INH To ADC V- To ADC V+ ADIP ADIN OP2O OP2N OP1O OP1N To ADC V+ FS9721_LP1 OP2P Diagram 22 Peak Commutation Circuit |
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