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NT5CB256M8FN датащи(PDF) 20 Page - Nanya Technology Corporation.

номер детали NT5CB256M8FN
подробное описание детали  Commercial, Industrial and Automotive DDR3(L) 2Gb SDRAM
PDF  163 Pages
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производитель  NANYA [Nanya Technology Corporation.]
домашняя страница  http://www.nanya.com
Logo NANYA - Nanya Technology Corporation.

NT5CB256M8FN датащи(HTML) 20 Page - Nanya Technology Corporation.

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DDR3(L) 2Gb SDRAM
NT5CB(C)256M8FN / NT5CB(C)128M16FP
Version 1.7
20
Nanya Technology Cooperation ©
04/2015
All Rights Reserved.
Mode Register MR1
The Mode Register MR1 stores the data for enabling or disabling the DLL, output strength, Rtt_Nom impedance, additive
latency, WRITE leveling enable and Qoff. The Mode Register 1 is written by asserting low on , RA, A, WE high on
BA0 and low on BA1 and BA2, while controlling the states of address pins according to the following figure.
MR1 Definition
BA2 BA1 BA0
A15-A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
0
0
Qoff TDQS
0
Rtt_Nom
0
Level Rtt_Nom D.I.C
Rtt_Nom
D.I.C DLL
A11
TDQS
A9
A6
A2
A4
A3
0
Disabled
0
0
0
0
0
1
Enabled
0
0
1
0
1
0
1
0
1
0
BA1 BA0
MR select
0
1
1
1
1
0
0
MR0
1
0
0
0
1
MR1
1
0
1
A0
1
0
MR2
1
1
0
0
1
1
MR3
1
1
1
1
A7
A5
A1
0
0
0
1
0
1
1
0
1
1
A12
0
1
Output buffer disabled
RZQ/12
RZQ/8
Reserved
Reserved
AL
Disabled
CL-1
CL-2
Reserved
AL
DLL Enable
Enable
Disable
RZQ/6
Reserved
Qoff
Output buffer enabled
Output Driver Impedance
RZQ/7
Reserved
Write Leveling enable
Disabled
RZQ/4
Disabled
Enabled
MR select
Rtt_Nom
RZQ/2
RZQ/6
* 1 : BA2 and A8, A10, and A13 ~ A15 are RFU and must be programmed to 0 during MRS.
*2: Outputs disabled - DQs, DQSs, s.
*3: RZQ = 240
*4: In Write leveling Mode (MR1[bit7] = 1) with MR1[bit12]=1, all RTT_Nom settings are allowed; in Write Leveling Mode (MR1[bit7] = 1) with
MR1[bit12]=0, only RTT_Nom settings of RZQ/2, RZQ/4 and RZQ/6 are allowed.
*5: If RTT_Nom is used during Writes, only the values RZQ/2, RZQ/4 and RZQ/6 are allowed.



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