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SDP117NHG датащи(PDF) 9 Page - Solitron Devices Inc. |
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SDP117NHG датащи(HTML) 9 Page - Solitron Devices Inc. |
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9 / 14 page ![]() STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99612 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics – Continued. Test Symbol Conditions -55 C T A +125C IL = 8 mA Group A subgroups Device type Limits Unit unless otherwise specified Min Max Device type 04 - Continued. Load regulation 2/ RLOAD VDIFF = 50 V, 8 mA I L 110 mA 1 04 25 mV VDIFF = 5.0 V, 1 25 8 mA I L 1.5 A 2,3 45 Thermal regulation VRTH VIN = -14.6 V, IL = 1.5 A, PD = 20 watts, t = 10 ms, TA = +25C 1 04 5 mV Ripple rejection 3/ RN f = 120 Hz, CADJ = 10 F, VOUT = VREF 4,5,6 04 66 dB Adjustment pin current IADJ-1 VDIFF = 3.0 V 1,2,3 04 100 A IADJ-2 VDIFF = 40 V 1,2,3 100 IADJ-3 VDIFF = 50 V 1,2,3 100 Adjustment pin current change I ADJ VDIFF = 5.0 V, 8 mA I OUT 1.5 A 1,2,3 04 5 A IL = 8 mA, 3.0 V V DIFF 50 V 1,2,3 6 Minimum load current ILMIN VDIFF = 3.0 V, VOUT = -1.4 V (forced) 1,2,3 04 3 mA VDIFF = 10 V, VOUT = -1.4 V (forced) 1,2,3 3 VDIFF = 40 V, VOUT = -1.4 V (forced) 1,2,3 5 VDIFF = 50 V, VOUT = -1.4 V (forced) 1,2,3 5 Current limit 3/ ICL VDIFF = 5 V 1,2,3 04 1.5 3.5 A VDIFF = 50 V 1 0.2 1.0 1/ To determine the line regulation limits for 3.0 V < VDIFF < 60 V (or 3.3 V VDIFF 60 V) add the limits for 3.0 V < VDIFF < 40 V (or 3.3 V VDIFF 40 V) to the limits for 40 V < VDIFF < 60 V. 2/ Regulation is measured at a constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to heating effects are covered under the specification for thermal regulation. With exception of cases U and Z, all output measurements are referenced to the case. Measurements taken at the output lead must be adjusted for lead resistance. 3/ If not tested, shall be guaranteed to the specified limits. |
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