© 2006 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FXLP34 • Rev. 1.0.4

8

Translator Power-up Sequence Recommendations

To ensure that the system does not experience

oscillations during power-up; adhere to the following

guidelines. This device is designed with the output pin(s)

The first recommendation is to begin by powering up the

This guards against bus contentions and oscillations as

voltage level to which the device will translate. The

output pin(s) then translate to logic levels dictated by the

Upon completion of these steps, the device can be

configured for the desired operation. Following these

steps helps prevent possible damage to the translator

device as well as other system components.

AC Loadings and Waveforms

Figure 3. AC Test Circuit

Figure 4. Waveform for Inverting and Non-Inverting Functions

Table 1.

AC Load Table

Symbol

3.3V ±0.3V

2.5V ±0.2V

1.8V ±0.15V

1.5V ±0.10V

1.2V ±0.10V

1.0V

1.5V

1.5V