14

ATSAM3103

6093A–DRMSD–25-Oct-04

Peripherals and Timings

Slave 8-bit Parallel

Interface

Pins used: D7-D0 (I/O), CS (input), A0 (input), WR (input), RD (input), IRQ (output).

This interface is typically used to connect the chip to a host processor.

Timings

Figure 8. Host Interface Read Cycle

Figure 9. Host Interface Write Cycle

Table 7. Timing Parameters

Symbol

Parameter

Min

Typ

Max

Unit

Address valid to chip select low

0

-

-

ns

Chip select low to RD low

5

-

-

ns

RD high to CS high

5

-

-

ns

RD pulse width

50

-

-

ns

t

RDLDV

Data out valid from RD

-

-

20

ns

t

DRH

Data out hold from RD

5

-

10

ns

t

CSLRWRL

Chip select low to WR low

5

-

-

ns

WR high to CS high

5

-

-

ns

WR pulse width

50

-

-

ns

Write data setup time

10

-

-

ns

t

DWH

Write data hold time

0

-

-

ns

A0

D0 - D7

CS

RD

A0

D0 - D7

CS

WR