MAS6510 datasheet(6/32 Pages) MAS

6 / 32 page

DA6510.009

6 September, 2018

6 (32)

ELECTRICAL CHARACTERISTICS

Operating Conditions: VDD = 2.7V, TA = -40

oC to +85oC, Typ TA = 27oC, SOSC=00, unless otherwise specified.

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

RMS capacitance

resolution @

CLIN=1.8pF

Difference mode, note 1

TEMPREGEN=0,

CLIN=1.8pF

OSR=4096

OSR=2048

OSR=1024

OSR=512

OSR=256

17.2 (15)

16.8 (19)

16.5 (25)

15.8 (39)

15.4 (53)

bit (aF)

RMS capacitance

resolution @

CLIN=4pF

Difference mode, note 1

TEMPREGEN=0,

CLIN=4pF

OSR=4096

OSR=2048

OSR=1024

OSR=512

OSR=256

17.5 (28)

16.9 (42)

16.1 (69)

15.7 (92)

15.1 (138)

bit (aF)

RMS capacitance

resolution @

CLIN=20pF

Difference mode, note 1

TEMPREGEN=0,

CLIN=20pF

OSR=4096

OSR=2048

OSR=1024

OSR=512

OSR=256

16.8 (217)

16.2 (337)

15.9 (417)

15.5 (546)

14.6 (1010)

bit (aF)

RMS capacitance

resolution @

CLIN=1.8pF

Ratio mode, note 1

TEMPREGEN=0,

CLIN=1.8pF

OSR=4096

OSR=2048

OSR=1024

OSR=512

OSR=256

14.3 (115)

14.1 (133)

13.5 (196)

13.0 (276)

12.6 (364)

bit (aF)

RMS capacitance

resolution@

CLIN=4pF

Ratio mode, note 1

TEMPREGEN=0,

CLIN=4pF

OSR=4096

OSR=2048

OSR=1024

OSR=512

OSR=256

15.2 (130)

14.7 (193)

14.4 (227)

14.0 (296)

13.3 (495)

bit (aF)

RMS capacitance

resolution @

CLIN=20pF

Ratio mode, note 1

TEMPREGEN=0,

CLIN=20pF

OSR=4096

OSR=2048

OSR=1024

OSR=512

OSR=256

16.0 (371)

15.7 (468)

15.6 (513)

15.2 (673)

14.6 (1004)

bit (aF)

EEPROM size

256

bit

EEPROM data

retention

TA = +85 °C

TA = +125 °C

Note 2

years

Note 1. Resolution in bits is calculated as follows: CN_BIT=log(CFS/CN)/log(2)= log(CODEFS/CODEN)/log(2) where CFS and CODEFS are full

scale changing capacitance (

C

FS=CLIN /0.8) and code range respectively, CN and CODEN are RMS noise in capacitance and code

respectively.

Note 2. Data retention values apply when extended EEPROM tests are done. Please contact Micro Analog Systems Oy if the data retention

values here need to be guaranteed by comprehensive EEPROM testing.

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