AP6502A

Document number: DS35812 Rev. 4 - 2

8 of 14

www.diodes.com

August 2015

© Diodes Incorporated

AP6502A

Undervoltage Lockout (UVLO)

Under Voltage Lockout is implemented to prevent the IC from insufficient input voltages. The AP6502A has a UVLO comparator that monitors

the input voltage and the internal bandgap reference. If the input voltage falls below 4.0V, the AP6502A will latch an under voltage fault. In this

event the output will be pulled low and power has to be re-cycled to reset the UVLO fault.

Overvoltage Protection

When the AP6502A FB pin exceeds 20% of the nominal regulation voltage of 0.925V, the overvoltage comparator is tripped and the COMP pin

and the SS pin are discharged to GND, forcing the high-side switch off.

Thermal Shutdown

The AP6502A has on-chip thermal protection that prevents damage to the IC when the die temperature exceeds safe margins. It implements a

thermal sensing to monitor the operating junction temperature of the IC. Once the die temperature rises to approximately +160°C, the thermal

protection feature gets activated. The internal thermal sense circuitry turns the IC off thus preventing the power switch from damage.

A hysteresis in the thermal sense circuit allows the device to cool down to approximately +120°C before the IC is enabled again through soft

start. This thermal hysteresis feature prevents undesirable oscillations of the thermal protection circuit.

Setting the Output Voltage

The output voltage can be adjusted from 0.925V to 20V using an external resistor divider. Table 1 shows a list of resistor selection for common

output voltages. Resistor R1 is selected based on a design tradeoff between efficiency and output voltage accuracy. For high values of R1 there

is less current consumption in the feedback network. However the trade off is output voltage accuracy due to the bias current in the error

amplifier. R1 can be determined by the following equation:



















1

0.925

OUT

V

2

R

1

R

Vout

FB

R1

R2

Figure 4 Feedback Divider Network

When output voltage is low, network as shown in Figure 4 is recommended.

R1 (kΩ)

R2 (kΩ)

5

45.3

10

3.3

26.1

10

2.5

16.9

10

1.8

9.53

10

1.2

3

10

Table 1. Resistor Selection for Common Output Voltages

Compensation Components

The AP6502A has an external COMP pin through which system stability and transient response can be controlled. COMP pin is the output of the

internal trans-conductance error amplifier. A series capacitor-resistor combination sets a pole-zero combination to control the characteristics of

the control system. The DC gain of the voltage feedback loop is given by:

OUT

FB

VEA

CS

LOAD

VDC

V

V

A

G

R

A







