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DAC8420FSZ датащи(PDF) 15 Page - Analog Devices

номер детали DAC8420FSZ
подробное описание детали  Quad 12-Bit Serial Voltage Output DAC
PDF  23 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

DAC8420FSZ датащи(HTML) 15 Page - Analog Devices

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Data Sheet
DAC8420
Rev. C | Page 15 of 23
VREFHI INPUT REQUIREMENTS
The DAC8420 utilizes a unique, patented DAC switch driver
circuit that compensates for different supply, reference voltage,
and digital code inputs. This ensures that all DAC ladder switches
are always biased equally, ensuring excellent linearity under all
conditions. Thus, as shown in Table 1, the VREFHI input of the
DAC8420 requires both sourcing and sinking current capabili-
ties from the reference voltage source. Many positive voltage
references are intended as current sources only and offer little
sinking capability. The user must consider references such as
the AD584, AD586, AD587, AD588, AD780, and REF43 for
such an application.
POWER-UP SEQUENCE
To prevent a CMOS latch-up condition, power up VDD, VSS,
and GND prior to any reference voltages. The ideal power-up
sequence is GND, VSS, VDD, VREFHI, VREFLO, and digital
inputs. Noncompliance with the power-up sequence over an
extended period can elevate the reference currents and eventually
damage the device. On the other hand, if the noncompliant
power-up sequence condition is as short as a few milliseconds,
the device can resume normal operation without being damaged
once VDD/VSS is powered.



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