MX8682

IXYS

Pin Description

Pin No.

Name

Description

1

PWR

Input Voltage Supply

2

SDO

Serial Data Output

3

NC

No Connect

4

SCK

Serial Clock Input

5

SDI

Serial Data Input

6

NC

No Connect

7

GND

Connect to Ground

8

CS*

Active low chip select for the serial interface. When a logic “high” is on this pin, the

MX8682 is tracking the hall input signal.

Detailed Circuit Description

The hall plate senses the magnetic field that is applied normal (perpendicular) to the package surface.

The signal from the hall plate is offset-corrected by detecting the difference between a pair of analog

samples during the acquisition time. During idle time (CS* high) the MX8682 tracks the first analog

sample. Immediately (~10 nS) after the falling edge of CS* the first sample is held. The track mode for

the second sample starts nominally 32 µS after the falling edge of CS*. Typically 96 µS after the falling

edge of CS* the second sample is held and the resulting analog value is then converted by the A/D. The

result of the A/D conversion is loaded into the I/O register at the next falling edge of CS*, in preparation

for output on SDO.

The internal acquisition and A/D timing is asynchronous to the SCK serial interface clock. The magnetic

field sampling period is controlled externally by the time between consecutive CS* falling edges. For zero

magnetic field input the nominal A/D output is 2048 decimal. North pole towards the top surface of the

MX8682 increases the A/D output count. Applications that require non-continuous one measurement at a

time operation should pulse CS* low twice, reading the data when CS* is low for the second time.

Serial Output (n)

A/D Convert (n+1)

Acquisition (n+1)

A/D Convert (n)

Acquisition (n)

CS*

SCK

SDO

externally controlled sampling period

13 12 11 10 98

76

54

32

14

15

0

1

13 12 11 10 98

76

54

32

14

15

0

1

MX8682

3

03/03/08

Drawing No. 0868209

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