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MP5030C датащи(PDF) 12 Page - Monolithic Power Systems

номер детали MP5030C
подробное описание детали  USB Charging Port Controller with Current Limit Switch, Supporting CDP, DCP, and QC3.0 Modes
PDF  17 Pages
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производитель  MPS [Monolithic Power Systems]
домашняя страница  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP5030C датащи(HTML) 12 Page - Monolithic Power Systems

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MP5030C
– USB CHARGING PORT CONTROLLER SUPPORTING CDP, DCP, AND QC3.0
MP5030C Rev. 1.01
www.MonolithicPower.com
12
9/28/2018
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
OPERATION
The MP5030C integrates a USB current-limit
switch and charging port identification circuit.
The MP5030C achieves 3A of continuous
output current over a wide input supply range.
The output of the USB switch is current-limited
with an adjustable current-limit threshold. The
MP5030C
supports
the
quick-charge
specification
(QC
3.0)
and
is
backwards-
compatible with QC 2.0. The MP5030C also
supports
DCP/CDP
schemes
for
battery
charging specification (BC1.2), divider mode,
and 1.2V/1.2V mode without the need for
external user interaction.
The MP5030C provides line drop compensation
for a 5V output. Fault condition protection
includes hiccup current limiting, input over-
voltage
protection
(OVP),
and
thermal
shutdown.
Operation Supply Voltage
The MP5030C has a two-stage input voltage
threshold. The first threshold is around 3V, and
the second threshold is the under-voltage
lockout (UVLO) of the power MOSFET. When
VIN is higher than the first threshold, the
MP5030C's ADJ block starts working and sinks
a current to adjust the upstream regulator's
output to an accurate 5V. Afterward, the
MP5030C enters a fully working state.
Under-Voltage Lockout (UVLO)
UVLO protects the chip from operating at an
insufficient supply voltage. The MP5030C's
second UVLO comparator monitors the input
voltage. Once the input voltage is higher than
the
second
UVLO
threshold,
the
power
MOSFET starts to turn on with a controlled slew
rate after a fixed delay.
Internal Soft Start (SS)
The internal soft-start prevents the output
voltage from inrush current and overshooting
during start-up.
MODE Selection
The MP5030C supports DCP and CDP modes
through MODE control. Pull MODE high to
operate the USB in DCP mode with the QC
function. Float MODE to operate the USB in
DCP mode without the QC function. Pull MODE
low to operate the USB in CDP mode.
In DCP mode, the MP5030C can provide power
for USB devices with protocol auto-detection. It
supports the following charging schemes:
 USB
battery
charging
specification
BC1.2/Chinese
Telecommunications
Industry
 Standard YD/T 1591-2009
 Divider mode
 1.2V/1.2V mode
 Quick-charge mode 2.0
 Quick-charge mode 3.0 (3.6 - 12V)
For better data transmission performance in
CDP mode, use the MP5030C in USB CDP
mode for handshaking. Bypass DP to DP_OUT.
DM to DM_OUT switches internally (see Figure
2).
DM
DP
Type-
A
DM_OUT
DP_OUT
To HOST
Controller
MP5030C
R8, 1kΩ
L2,Bead,
2.5kΩ
@100MHz
Figure 2: CDP Mode Set-Up
In CDP mode, the bus voltage (VBUS) is always
around 5V with current limit and line drop
compensation (see Table 1).
Table 1: MODE Selection
MODE Status
Supported Charge Mode
Logic high
DCP mode, divider mode,
QC2.0, QC3.0 mode, 1.2V/1.2V
mode
Float
DCP mode without QC function,
divider mode, 1.2V/1.2V mode
Logic low
CDP mode, 5VOUT with line drop
compensation
Connect DP and DM with a
150Ω resistor for
DCP without QC mode.
Line Drop Compensation
The MP5030C can compensate for an output
voltage drop, such as high impedance caused
by a long trace, to maintain a fairly constant 5V
load-side voltage. Line drop compensation is
achieved
through
ADJ.
The
MP5030C
increases the input voltage by 220mV at a 2.4A
output current (see Figure 3).



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