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AD9547BCPZ датащи(PDF) 60 Page - Analog Devices |
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AD9547BCPZ датащи(HTML) 60 Page - Analog Devices |
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60 / 106 page ![]() AD9547 Data Sheet REGISTER MAP The register addresses and defaults are hexadecimal values. The user should use the default value when writing to registers or bits marked as unused. Register addresses that are not listed in Table 37 are not used, and writing to those registers has no effect. The user should write the default value to sections of registers marked reserved. In the Opt (Option) column, A = autoclear; E = inaccessible to the EEPROM; L = live register (I/O update not required); R = read only; S = buffered register (update synchronous with serial port clock); and C = buffered register (update synchronous with SYSCLK/32). See the I/O Programming Registers section for details. Table 37. Addr Opt1 Name D7 D6 D5 D4 D3 D2 D1 D0 Def Serial port configuration and part identification 0x0000 L, E SPI control Unidirec- tional LSB first/ IncAddr Soft reset Long instruction Unused 0x10 0x0000 Dup I2C control Unused Soft reset Unused 0x00 0x0001 L, E Reserved Unused 0x0002 R, L Silicon revision level Silicon revision number 0xF6 0x0003 R, L Device ID Device ID 0x48 0x0004 L, E Register readback Unused Read buffer register 0x00 0x0005 L, A, E I/O update Unused I/O update 0x00 System clock (SYSCLK) 0x0100 S Charge pump/ lock detect control External loop filter enable Charge pump mode (auto/man) Charge pump current[2:0] Lock detect timer disable Lock detect timer[1:0] 0x18 0x0101 S N divider N divider[7:0] 0x28 0x0102 S System clock input options Unused M divider reset M divider[1:0] 2× frequency multiplier enable PLL enable SYSCLK source[1:0] 0x45 0x0103 C Nominal system clock period Nominal SYSCLK period[15:0] (in fs) (1 ns at 1 ppm accuracy) 0x40 0x0104 C 0x42 0x0105 C Unused Nominal SYSCLK period[20:16] 0x0F 0x0106 C System clock stability period SYSCLK stability period[15:0] (in ms) 0x01 0x0107 C 0x00 0x0108 C Unused System clock stability period[19:16] (in ms) 0x00 General configuration 0x0200 S M0 control M0 in/out M0 function[6:0] 0x00 0x0201 S M1 control M1 in/out M1 function[6:0] 0x00 0x0202 S M2 control M2 in/out M2 function[6:0] 0x00 0x0203 S M3 control M3 in/out M3 function[6:0] 0x00 0x0204 S M4 control M4 in/out M4 function[6:0] 0x00 0x0205 S M5 control M5 in/out M5 function[6:0] 0x00 0x0206 S M6 control M6 in/out M6 function[6:0] 0x00 0x0207 S M7 control M7 in/out M7 function[6:0] 0x00 0x0208 C IRQ pin output mode Unused IRQ pin output mode[1:0] 0x00 0x0209 C IRQ mask Unused SYSCLK unlocked SYSCLK locked Unused SYSCLK cal complete SYSCLK cal started 0x00 0x020A C Unused Distribution sync Watchdog timer EEPROM fault EEPROM complete 0x00 0x020B C Switching Closed Free run Holdover Frequency unlocked Frequency locked Phase unlocked Phase locked 0x00 0x020C C Unused History updated Frequency unclamped Frequency clamped Phase slew unlimited Phase slew limited 0x00 0x020D C Ref AA new profile Ref AA validated Ref AA fault cleared Ref AA fault Ref A new profile Ref A validated Ref A fault cleared Ref A fault 0x00 0x020E C Ref BB new profile Ref BB validated Ref BB fault cleared Ref BB fault Ref B new profile Ref B validated Ref B fault cleared Ref B fault 0x00 0x020F C Unused 0x00 0x0210 C Unused 0x00 Rev. G | Page 60 of 106 |
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