AD9523BCPZ datasheet(39/60 Pages) AD

номер детали	AD9523BCPZ

подробное описание детали	Jitter Cleaner and Clock Generator

PDF	60 Pages

Scroll/Zoom	100%

производитель	AD [Analog Devices]

домашняя страница	http://www.analog.com

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39 / 60 page

Data Sheet

AD9523

Rev. D | Page 39 of 60

START TIMEOUT CLOCK:

TIME = 0

CAL_COUNT = 0

R0x22C[1] = 1

TIMEOUT CLOCK:

TIME > 100ns

TIMEOUT CLOCK:

TIME >PLL2_TO1

CAL_COUNT > 1

ISSUE A PIN LEVEL

RESET OR SOFT RESET

YES

RST_COUNT =

RST_COUNT + 1

APPLY VDD

(ALL DOMAINS)

START

VDD SETTLED?

APPLY REFERENCE

INPUT(S)

SUBPROCESS:

WRITE REGISTERS

FROM

SETUP FILE

POR: WAIT 60ms

CAL_COUNT =

CAL_COUNT + 1

RST_COUNT >0

RAISE FLAG FOR

DEBUGGING.

READ:

R0x22C TO R0x22D

START TIMEOUT CLOCK:

TIME = 0

R0x22C[0] = 1

YES

END

RST_COUNT = 0

YES

PLL1 LOCK

DETECT POLLING

LOOP

PLL2 LOCK

DETECT POLLING

LOOP

PLL2 RECALIBRATION LOOP

CHIP LEVEL RESET LOOP

USER POWER

SUPPLIES

INITIALIZATION AND

POWER-ON RESET

WAIT

1PLL2_TO IS A CALCULATED TIMEOUT VALUE. SEE THE THEORY OF OPERATION, COMPONENT BLOCKS—INPUT PLL (PLL1) FOR ITS FORMULA.

WRITE:

R0x234 = 0x01

WRITE:

R0x0F3[1] = 1

WRITE:

R0x234 = 0x01

ISSUE VCO

CALIBRATION

COMMAND

WRITE:

R0x0F3[1] = 0

Figure 44. AD9523 Device Initialization

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