SCM1271MF datasheet(21/53 Pages) SANKEN

21 / 53 page

SCM1270MF Series

SCM1270MF-DSE Rev.1.4

SANKEN ELECTRIC CO., LTD.

Aug. 9, 2018

http://www.sanken-ele.co.jp/en

level-shifting process. When a noise-induced rapid

voltage

drop

between

the

VBx

and

HSx

pins

(“VBx–HSx”) occurs after the Set signal generation, the

next Reset signal cannot be sent to the SR flip-flop

circuit. And the state of an HOx signal stays logic high

(or “H”) because the SR flip-flop does not respond. With

the HOx state being held high (i.e., the high-side

transistor is in an on-state), the next LINx signal turns

the

low-side

transistor

and

causes

simultaneously-on condition, which may result in

critical damage to the IC. To protect the VBx pin against

such a noise effect, add a bootstrap capacitor, CBOOTx, in

each phase. CBOOTx must be placed near the IC, and be

connected between the VBx and HSx pins with a

minimal length of traces.

To use an electrolytic capacitor, add a 0.01 μF to 0.1

μF bypass capacitor, C

Px, in parallel near these pins used

for the same phase.

HINx

Input

logic

Pulse

generator

COMx

Set

Reset

HOx

VBx

HSx

Figure 12-2.

Internal Level-shifting Circuit

HINx

Set

Reset

VBx-HSx

VBS(OFF)

VBS(ON)

Stays logic high

Figure 12-3.

Waveforms at VBx–HSx Voltage Drop

12.2.3. HS1, HS2, and HS3

These pins are the grounds of the high-side floating

power supplies for each phase, and are connected to the

negative nodes of bootstrap capacitors, CBOOTx. The HS1,

HS2, and HS3 pins are internally connected to the U, V,

and W pins, respectively.

12.2.4. VCC1, VCC2, and VCC3

These are the logic supply pins for the built-in

pre-driver ICs. The VCC1, VCC2, and VCC3 pins must

be externally connected on a PCB because they are not

internally connected. To prevent malfunction induced by

supply ripples or other factors, put a 0.01 μF to 0.1 μF

ceramic capacitor, CVCCx, near these pins. To prevent

damage caused by surge voltages, put an 18 V to 20 V

Zener diode, DZ, between the VCCx and COMx pins.

Voltages to be applied between the VCCx and COMx

pins should be regulated within the recommended

operational range of VCC, given in Section 2.

12.2.5. COM1, COM2, and COM3

These are the logic ground pins for the built-in

pre-driver ICs. For proper control, the control parts in

each phase must be connected to the corresponding

ground pin. The COM1, COM2, and COM3 pins should

be connected externally on a PCB because they are not

internally connected. Varying electric potential of the

logic ground can be a cause of improper operations.

Therefore, connect the logic ground as close and short as

possible to a shunt resistor, RS, at a single-point ground

(or star ground) which is separated from the power

ground (see Figure 12-4). Moreover, extreme care

should be taken when wiring so that currents from the

power ground do not affect the COMx pin.

COM1

VBB

LS3

LS2

LS1

COM2

COM3

VDC

CDC

OCP1, OCP3

Create a single-point ground

(a star ground) near RS, but

keep it separated from the

power ground.

Connect COM1, COM2,

and COM3 on a PCB.

Figure 12-4.

Connections to Logic Ground

12.2.6. HIN1, HIN2, and HIN3;

LIN1, LIN2, and LIN3

These are the input pins of the internal motor drivers

for each phase. The HINx pin acts as a high-side

controller; the LINx pin acts as a low-side controller.

Figure 12-5 shows an internal circuit diagram of the

HINx or LINx pin. This is a CMOS Schmitt trigger

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