TDA9550 datasheet(24/125 Pages) PHILIPS

24 / 125 page

2000 Jun 22

Philips Semiconductors

Tentative Device Speciﬁcation

TV signal processor-Teletext decoder with

embedded

µ-Controller

TDA955X/6X/8X PS/N1 series

DISLAY X24

0 - Display row 24 from basic page memory

1 - Display row 24 from appropriate location in extension memory

AUTO FRAME

0 - Normal Frame output

1 - Frame output is switched off automatically if any video displayed

DISABLE

HEADER ROLL

0 - Write rolling headers and time to current display page

1 - Disable writing of rolling headers and time to into memory

DISPLAY

STATUS ROW

ONLY

0 - Display normal page rows 0 to 24

1- Display only row 24

DISABLE

FRAME

0 - Normal Frame output

1 - Force Frame output to be low (0)

VPS ON

0 - VPS acquisition off

1 - VPS acquisition on

INV ON

0 - Inventory page off

1 - Inventory page on

TXT1

EXT PKT

OFF

8 BIT

ACQ OFF

FULL

FIELD

POLARITY

00H

EXT PKT OFF

0 - Acquire extension packets X/24,X/27,8/30/X

1 - Disable acquisition of extension packets

8 BIT

0 - Error check and/or correct packets 0 to 24

1 - Disable checking of packets 0 to 24 written into memory

ACQ OFF

0 - Write requested data into display memory

1 - Disable writing of data into Display memory

X26 OFF

0 - Enable automatic processing of X/26 data

1 - Disable automatic processing of X/26 data

FULL FIELD

0 - Acquire CC data only on selected line.

1 - Acquire CC data on any TV line (for test purposes).

FIELD POLARIY

0 - Vsync pulse in ﬁrst half of line during even ﬁeld.

1 - Vsync pulse in second half of line during even ﬁeld.

H POLARITY

0 - Hsync reference edge is positive going

1 - Hsync reference edge is negative going

V POLARITY

0 - Vsync reference edge is positive going

1 - Vsync reference edge is negative going

TXT2

ACQ

BANK

REQ<3>

REQ<2>

REQ<1>

REQ<0>

SC<2>

SC<1>

SC<0>

00H

ACQ_BANK

0 - Select Acquisition bank 0

1 - Select Acquisition bank 1

REQ<3:0>

Page request

SC<2:0>

Start column of page request

TXT3

PRD<4>

PRD<3>

PRD<2>

PRD<1>

PRD<0>

00H

PRD<4:0>

Page Request data

Names

BIT7

BIT6

BIT5

BIT4

BIT3

BIT2

BIT1

BIT0

RESET

Table 3

SFR Bit description

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