LTC4221IGN datasheet(20/28 Pages) LINER

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LTC4221

4221f

Timer Function

The TIMER pin controls the initial cycle and the channel

start-up cycles with an external capacitor, CTIMER. There

are two comparator thresholds: VTMR(H) (1.234V) and

VTMR(L) (0.4V). In addition, the pin has a 1.9µA pull-up

current, a 20µA pull-up current and a N-channel MOSFET

pull-down.

Initial Timing Cycle

When the card is being inserted into the bus connector, the

long pins mate first which brings up the supplies at time

point 1 of Figure 13. The LTC4221 is in reset mode as the

ON1 pin is low. Both GATE pins and the TIMER pin are

pulled low. At time point 2, the short pin makes contact and

both ON pins are pulled high. At this instant, a start-up

check requires that both supply voltages be above UVLO,

at least one ON pin be above 0.851V, both GATE pins

< 0.4V and TIMER < 0.4V. When these four conditions are

fulfilled, the initial cycle begins and the TIMER pin is pulled

high with 1.9µA. At time point 3, the TIMER reaches

VTMR(H) and is pulled down below VTMR(L) by the N-

channel MOSFET pull-down, ending the initial cycle at time

point 4. The initial cycle delay is:

INITIAL

TIMER

1 234

.•

(9)

At time point 4, the LTC4221 checks whether the FILTER

pin is <1.24V and FAULT is > 0.851V. If both conditions are

met, a channel start-up cycle commences.

Start-Up Cycle Without Current Limit

During a channel start-up cycle, the TIMER pin ramps up

with a 20µA internal pull-up so the start-up cycle delay is:

STARTUP

TIMER

()

1 234

0 4

.– .

•

(10)

At the beginning of the start-up timing cycle (time point 4),

the LTC4221’s electronic circuit breaker is armed and each

channel has an internal 9.5µA current source working with

an internal charge pump to provide the gate drive to its

external pass transistor. At time point 5, GATE1 reaches

the external pass transistor threshold and VOUT1 starts to

follow the GATE1 ramp-up. If the inrush current is below

current limit, GATE1 ramps at a constant rate of:

∆

GATE

(11)

where CGATE is the total capacitance at the GATE1 pin. The

inrush current through RSENSE1 can be divided into two

components; ICLOAD due to the total load capacitance

CLOAD and ILOAD due to the noncapacitive load elements.

The load bypass capacitance typically dominates CLOAD.

For a successful channel start-up without current limit,

IINRUSH < active current limit. Due to the voltage follower

configuration, the VOUT1 ramp rate approximately tracks

VGATE1. The inrush current during a start-up cycle without

current limit is :

INRUSH

LOAD

OUT

LOAD

INRUSH

LOAD

GATE

LOAD

INRUSH

LOAD

GATE

LOAD

∆

⎛

⎝

⎜

⎞

⎠

⎟ +

∆

⎛

⎝

⎜

⎞

⎠

⎟ +

⎛

⎝

⎜

⎞

⎠

⎟ +

•

(12)

At time point 6, VOUT1 is approximately VCC1 but GATE1

ramp-up continues until it reaches a maximum voltage.

This maximum voltage is determined either by the charge

pump or the internal clamp.

APPLICATIO S I FOR ATIO

1.234V

VCCn

VOUT1

TIMER

GATE1

RESET

STATE

INITIAL

TIMING

CHANNEL 1

START-UP

NORMAL

20µA

9.5µA

0.4V

VTH

DISCHARGE

BY LOAD

4221 F13

0.851V

0.4V

3 4 5

1.9µA

Figure 13. Channel 1 Start-Up Without Current Limit

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