LTC4221IGN datasheet(16/28 Pages) LINER

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LTC4221

4221f

ON1 clears its off threshold and the initial timing cycle is

complete, the GATE1 pin is pulled up by a 9.5µA current

source connected to the charge pump output during the

channel start-up cycle. GATE1 can be servoed by adjusting

the ramp up current to <9.5µA to control the inrush

current to the load during start-up. ON2 controls GATE2 in

a similar manner but is overwritten by ON1’s global reset

function. During an overcurrent fault condition that sets

the fault latch, both GATE pins are pulled down by their

respective internal N-channel MOSFET pull-downs.

During hot insertion of the PCB, an abrupt application of

supply voltage charges the external MOSFET drain/gate

capacitance. This can cause an unwanted gate voltage

spike. An internal proprietary circuit holds both GATE pins

low before the internal circuitry wakes up. This reduces the

MOSFET current surges substantially at insertion.

Electronic Circuit Breaker

The LTC4221 features an electronic circuit breaker func-

tion that protects against supply overvoltage, externally

generated fault conditions and shorts or excessive load

current conditions on any of the supplies. If the circuit

breaker trips, both GATE pins are immediately pulled to

ground, the external N-channel MOSFETs are quickly

turned OFF and FAULT is latched low.

During the normal cycle, a supply overvoltage on channel

propagates via the VOUTn resistive dividers to the FBn pin.

A supply overvoltage high enough to pull either FB pin

above 0.822V for more than 18µs will trip the circuit

breaker.

The circuit breaker can also be made to trip by externally

forcing the bidirectional FAULT pin below 0.816V. The

FAULT pin has 35mV of hysteresis. An internal glitch filter

of 15µs filters out noise on the FAULT pin.

The slow comparator of channel

n trips the circuit breaker

if VRSENSEn = (VCCn – VSENSEn) is greater than its 25mV

threshold for more than 15µs. There may be applications

where this inherent response time is not long enough, for

example, because of excessive supply voltage noise. To

adjust the response time of the slow comparator, a capaci-

tor can be connected from the FILTER pin to GND. If this

pin is left unused, each slow comparator’s delay defaults

to 15µs. During normal operation, the FILTER output pin

is held low by an internal 1.8µA pull-down current source.

During an overcurrent condition on either channel as

shown in Figure 6, the 1.8µA pull-down on the FILTER pin

becomes an internal 105µA pull-up and CFILTER charges

up. Once the FILTER pin voltage ramps past its low-to-

high threshold of 1.24V at time point 2, the electronic

circuit breaker trips and the LTC4221 shuts down. The

FILTER pin’s internal 1.8µA pull-down discharges CFILTER

and holds FILTER low. Each slow comparator’s response

time from an overcurrent fault condition is:

FILTER

+µ

124

105

.•

(1)

Intermittent overloads may exceed the current limit as in

Figure 7, but if the duration is sufficiently short, the FILTER

pin may not reach the VFILTER(TH) threshold and the

LTC4221 will not shut down. To handle this situation, the

FILTER discharges with 1.8µA whenever both VRSENSE are

below 25mV. Any intermittent overload with an aggregate

APPLICATIO S I FOR ATIO

Figure 7. Multiple Intermittent Overcurrent Condition

~25mV/RSENSE1

~25mV/RSENSE2

CIRCUIT BREAKER

TRIPS

1.8µA

4221 F07

1.8µA

105µA

ILOAD1

ILOAD2

VFILTER

VGATE

1.24V

1.8µA

SLOW

COMPARATOR

TRIP

SLOW

COMPARATOR

TRIP

SLOW

COMPARATOR

TRIP

Figure 6. A Continuous Fault Timing

1.24V

NORMAL

SLOW

COMPARATOR

TRIP

VFILTER

CIRCUIT BREAKER TRIPS.

GATE1, GATE2 AND

FAULT PULL LOW

1.8µA

4221 F06

1.8µA

105µA

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