ADAU1977WBCPZ-R7 datasheet(33/68 Pages) AD

33 / 68 page

Data Sheet

ADAU1977

Rev. C | Page 33 of 68

I2C Read and Write Operations

Figure 37 shows the format of a single-word write operation.

Every ninth clock pulse, the ADAU1977 issues an acknowledge

by pulling SDA low.

Figure 38 shows the format of a burst mode write sequence.

This figure shows an example of a write to sequential single-

byte registers. The ADAU1977 increments its address register

after every byte because the requested address corresponds to a

Figure 39 shows the format of a single-word read operation.

Note that the first R/W bit is 0, indicating a write operation.

This is because the address still needs to be written to set up the

internal address. After the ADAU1977 acknowledges the receipt

of the address, the master must issue a repeated start command

followed by the chip address byte with the R/W bit set to 1

(read). This causes the ADAU1977 SDA to reverse and begin

driving data back to the master. The master then responds every

ninth pulse with an acknowledge pulse to the ADAU1977.

Figure 40 shows the format of a burst mode read sequence. This

figure shows an example of a read from sequential single-byte

registers. The ADAU1977 increments its address registers after

every byte because the ADAU1977 uses an 8-bit register address.

Figure 37 to Figure 40 use the following abbreviations:

S = start bit

P = stop bit

AM = acknowledge by master

AS = acknowledge by slave

Figure 37. Single-Word I2C Write Format

Figure 38. Burst Mode I2C Write Format

Figure 39. Single-Word I2C Read Format

Figure 40. Burst Mode I2C Read Format

CHIP ADDRESS,

R/W = 0

DATA BYTE

8 BITS

CHIP

ADDRESS,

R/W = 0

ADDRESS

8 BITS

DATA

BYTE 1

DATA

BYTE 2

DATA

BYTE 3

DATA

BYTE 4

...

CHIP

ADDRESS,

R/W = 0

DATA

BYTE 1

CHIP

ADDRESS,

R/W = 0

ADDRESS

8 BITS

CHIP

ADDRESS,

R/W = 1

DATA

BYTE 1

CHIP

ADDRESS,

R/W = 0

ADDRESS

8 BITS

DATA

BYTE 2

...

CHIP

ADDRESS,

R/W = 1

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