9

LTC2602/LTC2612/LTC2622

2602f

CS/LD (Pin 1): Serial Interface Chip Select/Load Input.

When CS/LD is low, SCK is enabled for shifting data on SDI

into the register. When CS/LD is taken high, SCK is dis-

abled and the specified command (see Table 1) is ex-

ecuted.

SCK (Pin 2): Serial Interface Clock Input. CMOS and TTL

compatible.

SDI (Pin 3): Serial Interface Data Input. Data is applied to

SDI for transfer to the device at the rising edge of SCK. The

BLOCK DIAGRA

LTC2602/LTC2612/LTC2622 accept input word lengths

of either 24 or 32 bits.

REF (Pin 4): Reference Voltage Input. 0V

GND (Pin 7): Analog Ground.

REF

CS/LD

SCK

GND

SDI

2602 BD

8

1

2

4

3

5

7

6

DAC A

DAC B

DECODE

CONTROL

LOGIC

24-BIT SHIFT REGISTER

Figure 1

TI I G DIAGRA

SDI

CS/LD

SCK

2602 F01

12

3

23

24

C3

C2

C1

D1

D0