ZL2005P datasheet(13/41 Pages) RENESAS

13 / 41 page

ZL2005P

FN6849 Rev 3.00

Page 13 of 41

December 16, 2011

Figure 8. Pin-strap and Resistor Setting

Examples

Pin-strap Settings: This is the simplest implementation

method, as no external components are required. Using

this method, each pin can take on one of three possible

states: GND, OPEN, or HIGH. These pins can be con-

nected to the VR or V25 pins for logic HIGH settings, as

either pin provides a regulated voltage greater than 2V.

Using a single pin, the user can select one of three set-

tings, and using two pins, the user can select one of nine

settings.

Resistor Settings: This method allows a greater range of

adjustability when connecting a finite valued resistor (in

a specified range) between the multi-mode pin and

SGND. Standard 1% resistor values are used, and only

every fourth E96 resistor value is used so that the device

can reliably recognize the value of resistance connected

to the pin while eliminating the errors associated with

the resistor accuracy. A total of 25 unique selections are

available using a single resistor.

I2C/SMBus Settings: Almost any ZL2005P function can

be configured via the I2C/SMBus interface using stan-

dard PMBus commands. Additionally, any value that has

been configured using the pin-strap or resistor setting

methods can also be re-configured and/or verified via

the I2C/SMBus. See Application Note AN2013 for

details.

The SMBus device address and VOUT_MAX are the

only parameters that must be set by external pins. All

other device parameters can be set via the I2C/SMBus.

the device address is set using the SA0 and SA1 pins.

The VOUT_MAX is determined as 10% greater than the

voltage set by the V0/V1 pins or VADJ pin.

Multi-mode Pin

RSET

Logic

high

Logic

low

Open

Pin-strap

Settings

Resistor

Settings

Multi-mode Pin

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