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P89LPC912FDH датащи(PDF) 2 Page - NXP Semiconductors |
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P89LPC912FDH датащи(HTML) 2 Page - NXP Semiconductors |
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2 / 63 page ![]() Philips Semiconductors P89LPC912/913/914 8-bit microcontrollers with two-clock 80C51 core Product data Rev. 03 — 17 December 2004 2 of 63 9397 750 14468 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. • Serial Flash In-Circuit Programming (ICP) allows simple production coding with commercial EPROM programmers. Flash security bits prevent reading of sensitive application programs. • Watchdog timer with separate on-chip oscillator, requiring no external components. The watchdog prescaler is selectable from 8 values. • Low voltage reset (Brownout detect) allows a graceful system shutdown when power fails. May optionally be configured as an interrupt. • Idle and two different Power-down reduced power modes. Improved wake-up from Power-down mode (a low interrupt input starts execution). Typical Power-down current is 1 µA (total Power-down with voltage comparators disabled). • Active-LOW reset. On-chip power-on reset allows operation without external reset components. A reset counter and reset glitch suppression circuitry prevent spurious and incomplete resets. A software reset function is also available. • Configurable on-chip oscillator with frequency range options selected by user programmed Flash configuration bits. Oscillator options support frequencies from 20 kHz to the maximum operating frequency of 18 MHz (P89LPC912, P89LPC913). • Oscillator Fail Detect. The watchdog timer has a separate fully on-chip oscillator allowing it to perform an oscillator fail detect function. • Programmable port output configuration options: quasi-bidirectional, open drain, push-pull, input-only. • Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of the pins match or do not match a programmable pattern. • LED drive capability (20 mA) on all port pins. A maximum limit is specified for the entire chip. • Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns minimum ramp times. • Only power and ground connections are required to operate the P89LPC912/913/914 when internal reset option is selected. • Four interrupt priority levels. • Four keypad interrupt inputs. • Second data pointer. • Schmitt trigger port inputs. • Emulation support. |
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