ISL6277HRZ datasheet(15/37 Pages) RENESAS

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ISL6277

FN8270 Rev 1.00

Page 15 of 37

Mar 8, 2012

Diode Emulation and Period Stretching

The ISL6277 can operate in diode emulation (DE) mode to

improve light-load efficiency. In DE mode, the low-side MOSFET

conducts when the current is flowing from source to drain and

does not allow reverse current, thus emulating a diode. As

Figure 10 shows, when LGATE is on, the low-side MOSFET carries

current, creating negative voltage on the phase node due to the

voltage drop across the on-resistance. The ISL6277 monitors the

current by monitoring the phase node voltage. It turns off LGATE

when the phase node voltage reaches zero to prevent the inductor

current from reversing the direction and creating unnecessary

power loss.

If the load current is light enough, as Figure 10 shows, the

inductor current reaches and stays at zero before the next phase

node pulse, and the regulator is in discontinuous conduction

mode (DCM). If the load current is heavy enough, the inductor

current will never reach 0A, and the regulator is in CCM, although

the controller is in DE mode.

Figure 11 shows the operation principle in diode emulation mode

at light load. The load gets incrementally lighter in the three cases

from top to bottom. The PWM on-time is determined by the VW

window size and therefore is the same, making the inductor

current triangle the same in the three cases. The ISL6277 clamps

the ripple capacitor voltage VCRS in DE mode to make it mimic the

inductor current. It takes the COMP voltage longer to hit VCRS,

naturally stretching the switching period. The inductor current

triangles move farther apart, such that the inductor current

average value is equal to the load current. The reduced switching

frequency helps increase light-load efficiency.

Channel Configuration

Individual PWM channels of either VR can be disabled by

connecting the ISENx pin of the channel not required to +5V. For

example, placing the controller in a 2+1 configuration, as shown

in Figure 5, requires ISEN3 of the Core VR and ISEN2 of the

Northbridge VR to be tied to +5V. This disables Channel 3 of the

Core VR and Channel 2 of the Northbridge VR. ISEN1_NB must

be tied through a 10kΩ resistor to GND to prevent this pin from

pulling high and disabling the channel. Connecting ISEN1 or

ISEN1_NB to +5V will disable the corresponding VR output. This

feature allows debug of individual VR outputs.

Power-On Reset

Before the controller has sufficient bias to guarantee proper

operation, the ISL6277 requires a +5V input supply tied to VDD

and VDDP to exceed the VDD rising power-on reset (POR)

threshold. Once this threshold is reached or exceeded, the

ISL6277 has enough bias to check the state of the SVI inputs

once ENABLE is taken high. Hysteresis between the rising and

the falling thresholds assure the ISL6277 does not inadvertently

turn off unless the bias voltage drops substantially (see

“Electrical Specifications” on page 11). Note that VIN must be

present for the controller to drive the output voltage.

FIGURE 9. R3

™ MODULATOR OPERATION PRINCIPLES IN LOAD

INSERTION RESPONSE

COMP

VCRM

MASTER

CLOCK

PWM1

VCRS1

CLOCK1

PWM2

VCRS2

CLOCK2

PWM3

CLOCK3

VCRS3

UGAT E

PH A S E

LG A T E

FIGURE 10. DIODE EMULATION

VCRS

CCM/DCM

BOUNDARY

LIGHT DCM

DEEP DCM

FIGURE 11. PERIOD STRETCHING

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