CS5014 datasheet(23/40 Pages) CIRRUS

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Power Supply Rejection

The CS5012A/14/16’s power supply rejection

performance is enhanced by the on-chip self-cali-

bration and an "auto-zero" process. Drifts in

power supply voltages at frequencies less than the

calibration rate have negligible effect on the

CS5012A/14/16’s accuracy. This is because the

CS5012A/14/16 adjust their offset to within a

small fraction of an LSB during calibration.

Above the calibration frequency the excellent

power supply rejection of the internal amplifiers

is augmented by an auto-zero process. Any

offsets are stored on the capacitor array and are

effectively subtracted once conversion is initiated.

Figure 13 shows power supply rejection of the

CS5012A/14/16 in the bipolar mode with the

analog input grounded and a 300 mVp-p ripple

applied to each supply. Power supply rejection

improves by 6 dB in the unipolar mode.

The plot in Figure 13 shows worst-case rejection

for all combinations of conversion rates and input

conditions in the bipolar mode.

CS5012A/14/16 PERFORMANCE

Differential Nonlinearity

One source of nonlinearity in A/D converters is

bit weight errors. These errors arise from the de-

viation of bits from their ideal binary-weighted

ratios, and lead to nonideal widths for each code.

If DNL errors are large, and code widths shrink

to zero, it is possible for one or more codes to be

entirely missing. The CS5012A/14/16 calibrate

all bits in the capacitor array to a small fraction

of an LSB resulting in nearly ideal DNL. Histo-

gram plots of typical DNL of the CS5012A/14/16

can be seen in Figures 14, 15, 16.

A histogram test is a statistical method of deriv-

ing an A/D converter’s differential nonlinearity. A

ramp is input to the A/D and a large number of

samples are taken to insure a high confidence

level in the test’s result. The number of occur-

rences for each code is monitored and stored. A

perfect A/D converter would have all codes of

equal size and therefore equal numbers of occur-

rences. In the histogram test a code with the

average number of occurrences will be consid-

ered ideal (DNL = 0). A code with more or less

occurrences than average will appear as a DNL

of greater or less than zero LSB. A missing code

has zero occurrences, and will appear as a DNL

of -1 LSB.

Integral Nonlinearity

Integral Nonlinearity (INL; also termed Relative

Accuracy or just Nonlinearity) is defined as the

deviation of the transfer function from an ideal

straight line. Bows in the transfer curve generate

harmonic distortion. The worst-case condition of

bit-weight errors (DNL) has traditionally also de-

fined the point of maximum INL.

Bit-weight errors have a drastic effect on a con-

verter’s ac performance. They can be analyzed as

step functions superimposed on the input signal.

Power Supply Ripple Frequency

1 kHz

10 kHz

100 kHz

1 MHz

Figure 13. Power Supply Rejection

CS5012A, CS5014, CS5016

DS14F8

2-29

CS5012A CS5014 CS5016

DS14F9

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