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TLE8457BLE датащи(PDF) 5 Page - Infineon Technologies AG |
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TLE8457BLE датащи(HTML) 5 Page - Infineon Technologies AG |
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5 / 33 page ![]() Data Sheet 5 Rev. 1.0 2016-08-05 TLE8457 LIN Transceiver with integrated Voltage Regulator Pin Configuration 3 Pin Configuration 3.1 Pin Assignment Figure 2 Pin configuration 3.2 Pin Definitions and Functions Pin Symbol Function 1 VS Battery Supply Voltage; Decoupling capacitor required 2EN Enable Input; Integrated pull-down resistor Logical “high” to select Normal Operation Mode 3GND Ground 4BUS BUS Input / Output; Integrated LIN Slave Termination 5RxD Receive Data Output; Monitors the LIN bus signal in Normal Operation Mode Indicates a wake-up event in Init Mode 6TxD Transmit Data Input; Integrated pull-up resistor Logical “low” to drive a dominant signal on the LIN bus 7 NRST Undervoltage Reset Output; Integrated pull-up resistor Logical “low” during Reset 8 VCC Voltage Regulator Output; Output capacitor requirements specified in Functional Device Characteristics PAD – Connect to PCB heat sink area. Do not connect to other potential than GND TLE8457_PINNING 1 2 3 45 6 7 8 VS 1 2 3 45 6 7 8 EN GND BUS VCC NRST TxD RxD VS EN GND BUS VCC NRST TxD RxD PG-DSO-8 PG-TSON-8 (Top side X-Ray view) (PAD) |
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