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HMC8410LP2FE датащи(PDF) 6 Page - Analog Devices

номер детали HMC8410LP2FE
подробное описание детали  Low Noise Amplifier
PDF  17 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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HMC8410LP2FE датащи(HTML) 6 Page - Analog Devices

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HMC8410
Data Sheet
Rev. A | Page 6 of 17
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
6
5
1
2
34
GND
RFIN/VGG1
NIC
NIC
RFOUT/VDD
NIC
HMC8410
TOP VIEW
(Not to Scale)
NOTES
1. NIC = NOT INTERNALLY CONNECTED. THIS PIN
MUST BE CONNECTED TO THE RF/DC GROUND.
2. EXPOSED PAD. THE EXPOSED PAD MUST BE
CONNECTED TO RF/DC GROUND.
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
GND
Ground. This pin must be connected to the RF/dc ground. See Figure 3 for the interface schematic.
2
RFIN/VGG1
RF Input (RFIN). This pin is ac-coupled and matched to 50 Ω. See Figure 4 for the interface schematic.
Gate Bias of the Amplifier (VGG1). This pin is ac-coupled and matched to 50 Ω. See Figure 4 for the interface
schematic.
3, 4, 6
NIC
Not Internally Connected. This pin must be connected to the RF/dc ground.
5
RFOUT/VDD
RF Output (RFOUT). This pin is ac-coupled and matched to 50 Ω. See Figure 5 for the interface schematic.
Drain Bias for Amplifier (VDD). This pin is ac-coupled and matched to 50 Ω. See Figure 5 for the interface schematic.
EPAD
Exposed Pad. The exposed pad must be connected to RF/dc ground.
INTERFACE SCHEMATICS
GND
Figure 3. GND Interface Schematic
RFIN/VGG1
Figure 4. RFIN/VGG1 Interface Schematic
RFOUT/VDD
Figure 5. RFOUT/VDD Interface Schematic



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