MCP3301 datasheet(22/32 Pages) MICROCHIP

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MCP3301

DS21700B-page 22

 2002 Microchip Technology Inc.

7.3

Using the MCP3301 with

Microcontroller (MCU) SPI Ports

With most microcontroller SPI ports, it is required to

clock out eight bits at a time. Using a hardware SPI port

with the MCP3301 is very easy because each conver-

sion requires 16 clocks. For example, Figure 7-4 and

Figure 7-5 show how the MCP3301 can be interfaced

to a microcontroller with a standard SPI port. Since the

MCP3301 always clocks data out on the falling edge of

clock, the MCU SPI port must be configured to match

this operation. SPI Mode 0,0 (clock idles low) and SPI

Mode 1,1 (clock idles high) are both compatible with

the MCP3301. Figure 7-4 depicts the operation shown

in SPI Mode 0,0, which requires that the CLK from the

microcontroller idles in the ‘low’ state. As shown in the

diagram, the sign bit is clocked out of the ADC on the

falling edge of the third clock pulse, followed by the

remaining 12 data bits (MSB first). Once the first eight

clocks have been sent to the device, the microcontrol-

ler’s receive buffer will contain two unknown bits (for

the first two clocks, the output is high impedance), fol-

lowed by the null bit, the sign bit and the highest order

four bits of the conversion. After the second eight

clocks have been sent to the device, the MCU receive

that, on the falling edge of clock 16, the ADC has begun

to shift out LSB first data.

Figure 7-5 shows the same scenario in SPI Mode 1,1,

which requires that the clock idles in the high state. As

with mode 0,0, the ADC outputs data on the falling

edge of the clock and the MCU latches data from the

ADC in on the rising edge of the clock.

FIGURE 7-4:

SPI Communication with the MCP3301 using 8-bit segments

(Mode 0,0: SCLK idles low).

FIGURE 7-5:

SPI Communication with the MCP3301 using 8-bit segments

(Mode 1,1: SCLK idles high).

LSB first data begins

to come out

CLK

910

OUT

NULL

BIT SB B11 B10 B9

HI-Z

B11 B10 B9

??0

MCU latches data from ADC

Data is clocked out of

ADC on falling edges

on rising edges of SCLK

HI-Z

Data stored into MCU receive register

after transmission of first 8 bits

Data stored into MCU receive register

after transmission of second 8 bits

X = Don’t Care Bits

? = Unknown Bits

CLK

910

OUT

NULL

BIT SB

B11 B10 B9

HI-Z

B11 B10 B9

??0

MCU latches data from ADC

Data is clocked out of

ADC on falling edges

on rising edges of SCLK

123

LSB first data begins

to come out

HI-Z

Data stored into MCU receive register

after transmission of first 8 bits

Data stored into MCU receive register

after transmission of second 8 bits

X = Don’t Care Bits

? = Unknown Bits

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