LTC4232 datasheet(9/20 Pages) LINER

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LTC4234

4234fa

For more information www.linear.com/LTC4234

OPERATION

The Functional Diagram displays the main circuits of the

device. The LTC4234 is designed to turn a board’s supply

voltageonandoffinacontrolledmannerallowingtheboard

to be safely inserted and removed from a live backplane.

The LTC4234 includes a 3.3mΩ MOSFET and a 0.7mΩ

currentsenseresistor. Duringnormaloperation,thecharge

pump and gate driver turn on the pass MOSFET’s gate to

provide power to the load. The inrush current control is

accomplished by the INRUSH circuit. This circuit limits

the GATE ramp rate to 0.35V/ms and hence controls the

voltage ramp rate of the output capacitor.

The current sense (CS) amplifier monitors the load current

usingthevoltagesensedacrossthecurrentsenseresistor.

The CS amplifier limits the current in the load by reduc-

ing the GATE-to-OUT voltage in an active control loop. It

is simple to adjust the current limit threshold using the

current limit adjustment (ISET) pin. This allows a different

threshold during other times such as start-up. Note there

must be a connection between SENSE to SENSE− (Pin 34

to Pin 31) in order to monitor current.

A short circuit on the output to ground causes significant

power dissipation during active current limiting. To limit

this power, the foldback amplifier reduces the current

limit value from 22.5A to 5.7A in a linear manner as the

FB pin drops below 0.6V (see the Typical Performance

Characteristics).

If an overcurrent condition persists, the TIMER pin ramps

up with a 100µA current source until the pin voltage

exceeds 1.235V (comparator TM2). This indicates to the

logic that it is time to turn off the pass MOSFET to prevent

overheating. At this point the TIMER pin ramps down

using the 2µA current source until the voltage drops below

0.21V(ComparatorTM1)whichcompletesonetimercycle.

After eight TIMER pin cycles (ramping to 1.235V and then

below 0.21V) the logic starts the internal 48ms timer. At

this point, the pass transistor has cooled and it is safe

to turn it on again. It is suitable in many applications to

use an internal 2ms overcurrent timer with a 900ms cool

down period. Tying the TIMER pin to INTVCC sets this

default timing. Latchoff is the normal operating condition

following overcurrent turnoff. Retry is initiated by pulling

the UV pin low for a minimum of 1µs then high. Auto-retry

is implemented by tying the FLT to the UV pin.

The output voltage is monitored using the FB pin and the

PG comparator to determine if power is available for the

load. The power good condition is signaled by the PG pin

using an open-drain pull-down transistor.

The Functional Diagram shows the monitoring blocks of

the LTC4234. The two comparators on the left side include

the UV and OV comparators. These comparators are used

to determine if the external conditions are valid prior to

turning on the MOSFET. But first the undervoltage lockout

circuits UVLO1 and UVLO2 must validate the input supply

and the internally generated 3.1V supply (INTVCC) and

generate the power up initialization to the logic circuits. If

the external conditions remain valid for 48ms the MOSFET

is allowed to turn on.

Other monitoring features include MOSFET current and

temperaturemonitoring.Thecurrentmonitor(CM)outputs

a current proportional to the sense resistor current. This

current can drive an external resistor or other circuits for

monitoring purposes. A voltage proportional to the MOS-

FET temperature is output to the ISET pin. The MOSFET is

protected by a thermal shutdown circuit.

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