8

LTC2604/LTC2614/LTC2624

2604f

(LTC2614)

Integral Nonlinearity (INL)

Differential Nonlinearity (DNL)

Settling to

±1LSB

Differential Nonlinearity (DNL)

Settling to

±1LSB

(LTC2624)

TYPICAL PERFOR A CE CHARACTERISTICS

CODE

0

4096

8192

12288

16383

2604 G28

8

6

4

2

0

–2

–4

–6

–8

CODE

0

4096

8192

12288

16383

2604 G29

1.0

0.8

0.6

0.4

0.2

0

–0.2

–0.4

–0.6

–0.8

–1.0

2

µs/DIV

2604 G30

100

µV/DIV

CS/LD

2V/DIV

1/4-SCALE TO 3/4-SCALE STEP

AVERAGE OF 2048 EVENTS

8.9

µs

CODE

0

1024

2048

3072

4095

2604 G31

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

CODE

0

1024

2048

3072

4095

2604 G32

1.0

0.8

0.6

0.4

0.2

0

–0.2

–0.4

–0.6

–0.8

–1.0

2

µs/DIV

2604 G33

1mV/DIV

CS/LD

2V/DIV

1/4-SCALE TO 3/4-SCALE STEP

AVERAGE OF 2048 EVENTS

6.8

µs

Integral Nonlinearity (INL)

GND (Pin 1): Analog Ground.

REF LO (Pin 2): Reference Low. The voltage at this pin sets

the zero scale (ZS) voltage of all DACs. The voltage range

is 0

REF A, REF B, REF C, REF D (Pins 3, 6, 12, 15): Reference

Voltage Inputs for each DAC. REF x sets the full scale

voltage of the DACs. 0V

Outputs. The output range is from REF LO to REF x.

CS/LD (Pin 7): Serial Interface Chip Select/Load Input.

When CS/LD is low, SCK is enabled for shifting data on SDI

into the register. When CS/LD is taken high, SCK is

disabled and the specified command (see Table 1) is

executed.

SCK (Pin 8): Serial Interface Clock Input. CMOS and TTL

compatible.

SDI (Pin 9): Serial Interface Data Input. Data is applied to

SDI for transfer to the device at the rising edge of SCK. The

LTC2604/LTC2614/LTC2624 accepts input word lengths

of either 24 or 32 bits.