LTC1609 datasheet(21/40 Pages) LINER

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LTC2345-18

234518f

For more information www.linear.com/LTC2345-18

INPUT VOLTAGE (V)

–1

LSB

234518 F02

011...111

011...110

000...001

000...000

100...000

100...001

111...110

LSB

BIPOLAR

ZERO

111...111

FSR/2 – 1LSB

–FSR/2

FSR = +FS – –FS

1LSB = FSR/262144

Figure 2. LTC2345-18 Two’s Complement Transfer Function

INPUT VOLTAGE (V)

235818 F03

111...111

111...110

100...001

100...000

000...000

000...001

011...110

UNIPOLAR

ZERO

011...111

FSR – 1LSB

FSR = +FS

1LSB = FSR/262144

Figure 3. LTC2345-18 Straight Binary Transfer Function

ANALOG INPUTS

Each channel of the LTC2345-18 simultaneously samples

the voltage difference (VIN+ – VIN–) between its analog

input pins over a wide common mode input range while

attenuating unwanted signals common to both input

pins by the common-mode rejection ratio (CMRR) of

the ADC. Wide common mode input range coupled with

applicaTions inForMaTion

high CMRR allows the IN+/IN– analog inputs to swing

with an arbitrary relationship to each other, provided

each pin remains between ground and VDD. This unique

feature of the LTC2345-18 enables it to accept a wide

variety of signal swings, including traditional classes of

analog input signals such as pseudo-differential unipolar,

pseudo-differentialbipolar, andfullydifferential,simplify-

ing signal chain design.

In all SoftSpan ranges, each channel’s analog inputs can

be modeled by the equivalent circuit shown in Figure 4.

At the start of acquisition, the 40pF sampling capacitors

(CIN) connect to the analog input pins IN+/IN– through the

samplingswitches,eachofwhichhasapproximately130Ω

(RIN)ofon-resistance.Theinitialvoltageonbothsampling

capacitorsatthestartofacquisitionisapproximatelyequal

to the sampled common-mode voltage (VIN+ + VIN–)/2

fromthepriorconversion.Theexternalcircuitryconnected

to IN+ and IN– must source or sink the charge that flows

through RIN as the sampling capacitors settle from their

initialvoltagestothenewinputpinvoltagesoverthecourse

of the acquisition interval. During conversion and power

down modes, the analog inputs draw only a small leakage

current. The diodes at the inputs provide ESD protection.

Figure 4. Equivalent Circuit for Differential Analog Inputs,

Single Channel Shown

IN+

RIN

130

RIN

130

CIN

40pF

CIN

40pF

VDD

BIAS

VOLTAGE

IN–

234518 F04

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