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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LTC2602 датащи(PDF) 4 Page - Linear Technology |
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LTC2602 датащи(HTML) 4 Page - Linear Technology |
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4 / 26 page  LTC2321-16 4 232116fc For more information www.linear.com/2321-16 DigiTal inpuTs anD DigiTal ouTpuTs power requireMenTs SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIH High Level Input Voltage l 0.8 • OVDD V VIL Low Level Input Voltage l 0.2 • OVDD V IIN Digital Input Current VIN = 0V to OVDD l –10 10 μA CIN Digital Input Capacitance 5 pF VOH High Level Output Voltage IO = -500µA l OVDD – 0.2 V VOL Low Level Output Voltage IO = 500µA l 0.2 V IOZ Hi-Z Output Leakage Current VOUT = 0V to OVDD l –10 10 µA ISOURCE Output Source Current VOUT = 0V –10 mA ISINK Output Sink Current VOUT = OVDD 10 mA VID LVDS Differential Input Voltage 100Ω Differential Termination OVDD = 2.5V l 240 600 mV VIS LVDS Common Mode Input Voltage 100Ω Differential Termination OVDD = 2.5V l 1 1.45 V VOD LVDS Differential Output Voltage 100Ω Differential Load, LVDS Mode OVDD = 2.5V l 100 150 300 mV VOS LVDS Common Mode Output Voltage 100Ω Differential Load, LVDS Mode OVDD = 2.5V l 0.85 1.2 1.4 V VOD_LP Low Power LVDS Differential Output Voltage 100Ω Differential Load, LVDS Mode OVDD = 2.5V l 75 100 250 mV VOS_LP Low Power LVDS Common Mode Output Voltage 100Ω Differential Load, LVDS Mode OVDD = 2.5V l 0.9 1.2 1.4 V SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VDD Supply Voltage 5V Operation 3.3V Operation l l 4.75 3.13 5.25 3.47 V V OVDD Supply Voltage l 1.71 2.63 V IVDD Supply Current 2Msps Sample Rate (IN+ = IN– = 0V) l 11.8 15 mA IOVDD Supply Current 2Msps Sample Rate (CL = 5pF) CMOS Mode 2Msps Sample Rate (RL = 100Ω) LVDS Mode l l 1.8 7.1 2 11 mA mA INAP Nap Mode Current Conversion Done (IVDD) l 2.55 5 mA ISLEEP Sleep Mode Current Sleep Mode (IVDD + IOVDD) CMOS Mode Sleep Mode (IVDD + IOVDD) LVDS Mode l l 1 1 5 5 μA μA PD_3.3V Power Dissipation VDD = 3.3V 2Msps Sample Rate (IN+ = IN– = 0V) CMOS Mode VDD = 3.3V 2Msps Sample Rate (IN+ = IN– = 0V) LVDS Mode l l 37 52 58 86 mW mW Nap Mode VDD = 3.3V Conversion Done (IVDD + IOVDD) CMOS Mode VDD = 3.3V Conversion Done (IVDD + IOVDD) LVDS Mode l l 7.8 26 13 41 mW mW Sleep Mode VDD = 3.3V Sleep Mode (IVDD + IOVDD) CMOS Mode VDD = 3.3V Sleep Mode (IVDD + IOVDD) LVDS Mode l l 5 5 16.5 16.5 μW μW PD_5V Power Dissipation VDD = 5V 2Msps Sample Rate (IN+ = IN– = 0V) CMOS Mode VDD = 5V 2Msps Sample Rate (IN+ = IN– = 0V) LVDS Mode l l 62 77 80 102.5 mW mW Nap Mode VDD = 5V Conversion Done (IVDD + IOVDD) CMOS Mode VDD = 5V Conversion Done (IVDD + IOVDD) LVDS Mode l l 13 31 25 40 mW mW Sleep Mode VDD = 5V Sleep Mode (IVDD + IOVDD) CMOS Mode VDD = 5V Sleep Mode (IVDD + IOVDD) LVDS Mode l l 5 5 25 25 μW μW The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 4). The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 4). |
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