LTM4606 datasheet(16/24 Pages) LINER

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LTM8050

8050fc

For more information www.linear.com/LTM8050

APPLICATIONS INFORMATION

Figure 2. The Input Diode Prevents a Shorted Input from

Discharging a Backup Battery Tied to the Output. It Also Protects

the Circuit from a Reversed Input. The LTM8050 Runs Only

When the Input is Present

minimize EMI and ensure proper operation. Even with the

high level of integration, you may fail to achieve specified

operation with a haphazard or poor layout. See Figure 3

for a suggested layout. Ensure that the grounding and

heat sinking are acceptable.

1. Place the RFB and RT resistors as close as possible to

their respective pins.

2. Place the CIN capacitor as close as possible to the VIN

and GND connection of the LTM8050.

3. Place the COUT capacitor as close as possible to the

VOUT and GND connection of the LTM8050.

4. Place the CIN and COUT capacitors such that their

ground current flow directly adjacent to or underneath

the LTM8050.

5. Connect all of the GND connections to as large a copper

pour or plane area as possible on the top layer. Avoid

breaking the ground connection between the external

components and the LTM8050.

6. For good heat sinking, use vias to connect the GND cop-

per area to the board’s internal ground planes. Liberally

distributetheseGNDviastoprovidebothagoodground

connectionandthermalpathtotheinternalplanesofthe

printed circuit board. Pay attention to the location and

density of the thermal vias in Figure 3. The LTM8050

can benefit from the heat-sinking afforded by vias that

connecttointernalGNDplanesattheselocations,dueto

their proximity to internal power handling components.

The optimum number of thermal vias depends upon

the printed circuit board design. For example, a board

might use very small via holes. It should employ more

thermal vias than a board that uses larger holes.

Hot-Plugging Safely

The small size, robustness and low impedance of ceramic

capacitors make them an attractive option for the input

bypass capacitor of LTM8050. However, these capacitors

can cause problems if the LTM8050 is plugged into a live

supply (see Linear Technology Application Note 88 for a

complete discussion). The low loss ceramic capacitor

combined with stray inductance in series with the power

source forms an underdamped tank circuit, and the volt-

age at the VIN pin of the LTM8050 can ring to more than

twice the nominal input voltage, possibly exceeding the

LTM8050’s rating and damaging the part. If the input

supply is poorly controlled or the user will be plugging

the LTM8050 into an energized supply, the input network

should be designed to prevent this overshoot. This can be

accomplished by installing a small resistor in series to VIN,

but the most popular method of controlling input voltage

overshoot is to add an electrolytic bulk capacitor to the

VIN net. This capacitor’s relatively high equivalent series

resistance damps the circuit and eliminates the voltage

overshoot. The extra capacitor improves low frequency

ripple filtering and can slightly improve the efficiency of

the circuit, though it is likely to be the largest component

in the circuit.

VIN

RUN/SS

VOUT

GND

8050 F02

LTM8050

VIN

VOUT

AUX

BIAS

SYNC

BIAS

AUX

VOUT

VIN

GND

8050 F03

GND

THERMAL VIAS TO GND

RFB

PGOOD

CIN

COUT

SYNC

RUN/SS

Figure 3. Layout Showing Suggested External Components, GND

Plane and Thermal Vias

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